Emerging Materials for Neuromorphic Devices and Systems

Implementation of Synaptic Device Using Ultraviolet Ozone Treated Water‐in‐Bisalt/Polymer Electrolyte‐Gated Transistor

“…In biological nervous system, PPF, which corresponds to the engraved memory effect observed for two temporally close incidents, is a representative short-term plasticity behavior that two successive presynaptic spikes with a time interval (∆t) amplify postsynaptic current. [1][2][3]43] PPF index is defined as the ratio between the maximum current level in the first EPSC signal (A1) and that in the second EPSC signal (A2) In our study, the PPF consisting of two series of electrical pulses applied to the gate electrode, where a pulse is a square wave with a width of 20 ms and an electrical potential of 4 V and ∆t = 5 s, 2 s, and 0.001 s. Figure 5a shows the PPF index increases from 100, 103, and 182 when the pulse interval decreases from 5, 2, and 0.001 s. The index indicates that the shorter the pulse interval between two consecutive pulses is, the greater the EPSC peak amplification is in the UVO-treated WEST.…”

“…[1][2][3][4] The neuromorphic architecture can overcome the bottleneck of the classical von Neumann architecture, where CPU and memory elements are separated. [1][2][3][4] The neuromorphic system sheds light on the necessity of synaptic device which can perform functions of biological synapses, which connect adjacent two neurons, such as excitatory post-synaptic current (EPSC), paired-pulse facilitation (PPF), spiketiming-dependent plasticity (STDP), and short-term and long-term plasticity. [2,4] In these synaptic functions, long-term plasticity has been considered as one of the most important functions to implement nonvolatile memory and self-learning process in neural network computing.…”

“…Neuromorphic architecture, which mimics the way biological neurons transmit signal to one another (i.e., synaptic function), has been proposed for the next generation computing paradigm with the advantage of energy efficiency and fast switching speed by parallel processing. [1][2][3][4] The neuromorphic architecture can overcome the bottleneck of the classical von Neumann architecture, where CPU and memory elements are separated. [1][2][3][4] The neuromorphic system sheds light on the necessity of synaptic device which can perform functions of biological synapses, which connect adjacent two neurons, such as excitatory post-synaptic current (EPSC), paired-pulse facilitation (PPF), spiketiming-dependent plasticity (STDP), and short-term and long-term plasticity.…”

CMOS-compatible compute-in-memory accelerators based on integrated ferroelectric synaptic arrays for convolution neural networks

“…For accurate VMM operation, synaptic devices are required, which can precisely adjust the conductance states via analog conductance modulation (5,11,12). In previous studies, several CIM devices with a crossbar structure have been demonstrated using two-terminal devices, such as phase-change and resistive-switching memories, as synaptic devices (13)(14)(15)(16)(17)(18). However, when CIM is implemented using crossbar arrays based on two-terminal devices, there are issues such as cross-talk, sneak path current, and nonlinear current-voltage characteristics (19)(20)(21).…”

“…However, the use of active ions (e.g., Li + ) may be incompatible with complementary metal-oxide semiconductor (CMOS) device fabrication and integration (17,32). Although charge-trapping transistors are based on mature technology for array integration, they require a high operation voltage and exhibit nonlinear weight update characteristics (16,20). Among the available three-terminal synaptic devices, ferroelectric transistors based on zirconium-doped hafnium oxide (HfZrO x ) are advantageous because they have CMOS compatibility, fast operation speed, low operation voltages, and high scalability (33)(34)(35)(36).…”