EMI resisting MOSFET-only voltage reference based on ZTC condition

Cordova, David; Toledo, Pedro; Klimach, Hamilton; Bampi, Sérgio; Fabris, Eric

doi:10.1007/s10470-016-0766-5

Cited by 9 publications

(11 citation statements)

References 24 publications

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“…The proposed high-PSRR voltage reference temperature cancellation is based on MOSFET ZTC vicinity condition, 1) and (2) [3].…”

Section: Ztc-based Voltage Referencementioning

confidence: 99%

“…V GB (T ) is the gate-bulk voltage, V GZ is the ZTC gate-bulk voltage, β z is the ZTC slope, ∆I d = I D − I DZ indicates how far the transistor is biased from the ZTC operating point, I D is the drain current, I DZ is the drain current exactly on ZTC condition, T is the temperature, I SQ is the normalized specific current, W L is the transistor aspect ratio, T 0 is the room temperature, V T 0 (T 0 ) is the threshold voltage at room temperature, n is the slope factor, V SB is the source-bulk voltage and α V T 0 is the thermal coefficient of the threshold voltage [3].…”

Section: Ztc-based Voltage Referencementioning

confidence: 99%

“…(3) gives the final value for V REF and Eq. (4) ensures the first order thermal drift cancellation [3].…”

Section: Ztc-based Voltage Referencementioning

confidence: 99%

“…Fig. 1 (a) shows the block diagram for the PSRR calculation of the voltage reference in [3]. R EQ is the equivalent resistance from the node V REF to ground, H(s) and L(s) = A(s)A P D (s), the open-loop gain and the loop gain, respectively.…”

Section: Ztc-based Voltage Referencementioning

confidence: 99%

“…The circuit is based on [3] with improvements on the PSRR, DC Shift and Peak-to-Peak ripple. The paper is organized as follows: Section II, the ZTCbased voltage reference.…”

Section: Introductionmentioning

confidence: 99%

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A 90 dB PSRR, 4 dBm EMI resistant MOSFET-Only Voltage Reference

Cordova

Toledo

Klimach

et al. 2016

2016 IEEE 7th Latin American Symposium on Circuits &Amp; Systems (LASCAS)

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Electromagnetic Interference (EMI) degrades the performance of voltage and current references, due to its finite Power Supply Rejection Ratio (PSRR). The design of a 90 dB PSRR, 4 dBm EMI resistant MOSFET-Only Voltage Reference is herein presented. The Voltage Reference is designed based on the Zero Temperature Coefficient (ZTC) transistor point. The high-PSRR is obtained using zero-VT transistors as active loads in the open and feedback loop of the circuit. The final circuit was designed in a 130 nm CMOS process and occupies around 0.014 mm 2 of silicon area while consuming just 1.15 µW . Postlayout simulations present a 206 mV of Voltage Reference with a Temperature Coefficient of 321 ppm/ o C, for the temperature range from -55 to 125 o C. An EMI source of 4 dBm (1 Vpp) injected in the power supply , according to the Direct Power Injection (DPI) standard, yield in a maximum DC Shift and Peak-to-Peak ripple of -0.17 % and 822 µVpp, respectively.

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“…The proposed high-PSRR voltage reference temperature cancellation is based on MOSFET ZTC vicinity condition, 1) and (2) [3].…”

Section: Ztc-based Voltage Referencementioning

confidence: 99%

Section: Ztc-based Voltage Referencementioning

confidence: 99%

“…(3) gives the final value for V REF and Eq. (4) ensures the first order thermal drift cancellation [3].…”

Section: Ztc-based Voltage Referencementioning

confidence: 99%

Section: Ztc-based Voltage Referencementioning

confidence: 99%

“…The circuit is based on [3] with improvements on the PSRR, DC Shift and Peak-to-Peak ripple. The paper is organized as follows: Section II, the ZTCbased voltage reference.…”

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations