Enabling an OpenCL Compiler for Embedded Multicore DSP Systems

Li, Jia-Jhe; Kuan, Chung‐Ming; Wu, Tung-Yu; Lee, Jenq Kuen

doi:10.1109/icppw.2012.74

Cited by 10 publications

(5 citation statements)

References 11 publications

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“…This split is, however, transparent to the programmer: the programmer just uses OpenCL and pocl automatically calls the TCE compiler in the background when the chosen device is a TCE coprocessor. Li et al [46] also reported a similar compilation flow, but instead of a retargetable TTA target they had a VLIW processor.…”

Section: B Processor Design and Code Generation Workflowmentioning

confidence: 99%

LordCore: Energy-Efficient OpenCL-Programmable Software-Defined Radio Coprocessor

Kultala

Viitanen²,

Berg

et al. 2019

IEEE Trans. VLSI Syst.

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This paper proposes a single instruction multiple data (SIMD) processor, which is programmed with high-level OpenCL language. The low-power processor is customized for executing multiple-input-multiple-output (MIMO) detection algorithms at a high performance while consuming very little power making it suitable for software-defined radio (SDR) applications. The novel combination of SIMD operations on a transport programmed multicore datapath allows saving power on both the execution front end and the back end, leading to very good energy efficiency with a compiler programmable design. We demonstrate the feasibility of the architecture with the layered orthogonal lattice detector and minimum mean-squareerror MIMO algorithms, which can be used as a software-defined radio implementation of the 3GPP local thermal equilibrium r11 standard. Compared to other state-of-the-art SDR architectures, the proposed design adds features that improve programmer productivity with an insignificant power and area impact.

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Section: B Processor Design and Code Generation Workflowmentioning

confidence: 99%

LordCore: Energy-Efficient OpenCL-Programmable Software-Defined Radio Coprocessor

Kultala

Viitanen²,

Berg

et al. 2019

IEEE Trans. VLSI Syst.

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“…The PACDSP is a five-way, dual-clustered VLIW DSP core with SIMD instructions and a distributed register file. Each cluster contains a load/store unit (LSU) and an ALU, with the fifth execution slot utilised by a shared scalar unit [21]. The PACDUO is platform with a dual-core PACDSP coupled to an ARM core and OpenCL is enabled on this device through source transformations.…”

Section: ) Multi-core Cpus and Dspsmentioning

confidence: 99%

An OpenCL software compilation framework targeting an SoC-FPGA VLIW chip multiprocessor

Parker

Chouliaras

2016

Journal of Systems Architecture

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“…OpenMP and OpenCL [8] are two standards for parallel computing, but in the embedded multicore DSP system, OpenCL is not available. In some situation, manually parallelization [9] and optimization are needed for better performance.…”

Section: Introductionmentioning

confidence: 99%

The optimization of improved mean shift object tracking in embedded multicore DSP parallel system

et al. 2014

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This paper proposes a more robust and efficient Mean Shift object tracking algorithm which is optimized for embedded multicore DSP Parallel system. Firstly, the RGB image is transformed into HSV image which is robust in many aspects such as lighting changes. Then, the color histogram model is used in the back projection process to generate the color probability distribution. Secondly, the size and position of search window are initialized in the first frame, and Mean Shift algorithm calculates the center position of the target and adjusts the search window automatically both in size and location, according to the result of the previous frame. Finally, since the multicore DSP system is commonly adopted in the embedded application such as seeker and an optical scout system, we implement the proposed algorithm in the TI multicore DSP system to meet the need of large amount computation. For multicore parallel computing, the explicit IPC based multicore framework is designed which outperforms OpenMP standard. Moreover, the parallelisms of 8 functional units and cross path data fetch capability of C66 core are utilized to accelerate the computation of iteration in Mean Shift algorithm. The experimental results show that the algorithm has good performance in complex scenes such as deformation, scale change and occlusion, simultaneously the proposed optimization method can significantly reduce the computation time.

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Enabling an OpenCL Compiler for Embedded Multicore DSP Systems

Cited by 10 publications

References 11 publications

LordCore: Energy-Efficient OpenCL-Programmable Software-Defined Radio Coprocessor

LordCore: Energy-Efficient OpenCL-Programmable Software-Defined Radio Coprocessor

An OpenCL software compilation framework targeting an SoC-FPGA VLIW chip multiprocessor

The optimization of improved mean shift object tracking in embedded multicore DSP parallel system

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