Enabling efficient rate and temporal coding using reliability‐aware design of a neuromorphic circuit

Abstract

Reliability aspects such as bias temperature instability (BTI) and hot carrier injection (HCI) affecting devices in advanced CMOS-based technology have been the subject of active research in recent decades. Due to these reliability issues, various digital and analog circuits were investigated for degradation.However, circuit blocks like the neuron circuits of neuromorphic systems are not fully explored. This work is inclined toward examining the collective degradation impact of BTI and HCI due to aging in an adaptive exponential "integrate and fire" (I&F) model-based, neuromorphic neuron circuit. Detailed degradation analysis of the stimulated neuron circuit aided in identifying possible mismatches/faults associated with neuron spikes. These factors could reduce the efficiency of the neuronal circuit by potentially affecting the transmission of information in a neuromorphic system. Various performance parameters were then derived to quantify the extent of circuit deterioration. The proposed reliability-aware design aims to improve the circuit degradation through its effectiveness in alleviating the overall reliability impact. It demonstrates enhanced circuit operation in spike generation even after aging. The circuit performance is validated through simulations at "Time0" (pre-degradation) and "Aged" (post-degradation) neuron netlists, which is then compared with the proposed reliability-aware circuit.

Spike frequency adaptation: bridging neural models and neuromorphic applications

“…Here, the ALIF neuron model is a state function in which the membrane voltage and neuron threshold are updated with every iteration. More hardware-realistic neuromorphic circuit simulation is shown in 72 . While this list encapsulates a range of simulators pivotal to SFA-based SNN simulation, it is imperative to note that the spiking neural network landscape is rich and continually expanding, with numerous other simulators also playing crucial roles in advancing this field.…”

“…Digital implementation of modified AdEx neuron models on FPGA further amplifies the possibilities [70][71][72] . Innovations such as 73 demonstrate improvements in speed and footprint without compromising neuronal dynamics.…”