Enabling Hardware Exploration in Software-Defined Networking: A Flexible, Portable OpenFlow Switch

Abstract

Abstract-The OpenFlow framework allows the data plane of a network switch to be managed by a software-based controller. This enables a software-defined networking model in which sophisticated network management policies can be deployed. In this paper, we present an FPGA-based switch which is fully-compliant with OpenFlow 1.0, and meets the 10 Gbps line rate. The switch design is both modular and highly parametrized. It has generic split-transaction interfaces and isolated platform-specific features, making it both flexible for architectural exploration and portable across FPGA platforms. The flow tables in the switch can be implemented on Block RAM or DRAM without any modifications to the rest of the design. The switch has been ported to the NetFPGA-10G, the ML605 and the DE4 boards. It can be integrated with a Desktop PC via either the PCIe or the serial link, and with an FPGA-based MIPS64 softcore as a coprocessor. The latter FPGA-based switch-processor system provides an ideal platform for network research in which both the data plane and the control plane can be explored.

Expanding OpenFlow Capabilities with Virtualized Reconfigurable Hardware

“…Throughput is nearly unaffected, measured using iperf at 938 Mb/s, only a 0.3% difference -verifying that flow redirection with VFRs can nearly eliminate the software overheads of VXLAN tunnels in OVS. [6]. Their goal was to enable experimental exploration of SDN control and data planes, whereas the work we present here uses available cloud-based FPGAs to enhance existing OpenFlow networks with custom functions.…”

A flexible and scalable high-performance OpenFlow switch on heterogeneous SoC platforms

“…In the recent years, several OpenFlow switch works have been proposed in the literature [16], [17], [18]. [16] demonstrates an OpenFlow switch implemented on the NetFPGA-1G platform.…”

“…The communication channel on NetFPGA-1G is built through the 64-bit PCI bus with a clock of 125 MHz. [18] impletements the OpenFlow switch on the platform which is a integration of NetFPGA-10G and MIPS64 softcore. The work achieves a line rate of 10 Gbps.…”

“…There has been a growing interest in employing FPGA in the OpenFlow research. For example, NetFPGA platform [19] has shown its potential in developing OpenFlow switch [16], [18].…”

A Framework of Controller with Flow Table Cache and Performance Analysis in Software Defined Industrial Networks

“…The performance of OpenFlow switch implemented on NetFPGA platform is evaluated in the study (Khan and Dave, 2013), but it is limited by a single switch and the implementation platform. OpenFlow switches are deployed on the Linux platform in study (Sherwood and kok-kiong, 2013), and performance evaluation are extended to L2 and L3 routing.…”