Enabling high-speed, high-resolution ADCs using signal conditioning algorithms

Abstract

Time-interleaving several identical A/D converters enhances the overall conversion speed in a power-economical way. However, mismatches between individual channels in such schemes degrade the overall dynamic range of the converter. Several algorithms to mitigate such effects are discussed with special emphasis on an adaptive signal-conditioning algorithm. The algorithm is further extended towards a hardware-friendly implementation using interpolation filters. Behavioral simulations corroborating the same are presented.