49th International Conference on Parallel Processing - ICPP 2020
DOI: 10.1145/3404397.3404441
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Enabling performance portability of data-parallel OpenMP applications on asymmetric multicore processors

Abstract: Asymmetric multicore processors (AMPs) couple high-performance big cores and low-power small cores with the same instruction-set architecture but different features, such as clock frequency or microarchitecture. Previous work has shown that asymmetric designs may deliver higher energy efficiency than symmetric multicores for diverse workloads. Despite their benefits, AMPs pose significant challenges to runtime systems of parallel programming models. While previous work has mainly explored how to efficiently ex… Show more

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Cited by 7 publications
(23 citation statements)
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“…For legacy platforms not officially supporting kernel versions newer than v5.8. y (such as the ARM-based Odroid-XU4 board 11,52 ), PMCSched can still be used, but requires a patched Linux kernel that either includes the necessary ftrace (backported) bugfixes, or incorporates the changes of the old PMCTrack patch.…”
Section: Design and Implementation Of Pmcschedmentioning
confidence: 99%
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“…For legacy platforms not officially supporting kernel versions newer than v5.8. y (such as the ARM-based Odroid-XU4 board 11,52 ), PMCSched can still be used, but requires a patched Linux kernel that either includes the necessary ftrace (backported) bugfixes, or incorporates the changes of the old PMCTrack patch.…”
Section: Design and Implementation Of Pmcschedmentioning
confidence: 99%
“…2,[7][8][9][10] When a single multithreaded application runs alone on an AMP system, smart user-level scheduling within the runtime system is the key to making the most out of its heterogeneous cores. 7,11 However, in multi-application scenarios, and especially under the presence of legacy programs, the OS scheduler plays an essential role in transparently delivering the benefits of AMPs to the end user. 2,9,12,13 In our work, we focus on designing and implementing effective OS and runtime-level schedulers to deal with single-and multi-application scenarios, by leveraging smart interaction between system software layers when possible.…”
mentioning
confidence: 99%
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“…Unfortunately, and despite best efforts by the HPC community, achieving performance portability across slightly or widely varying architectures is still an unobtainable goal. Modern features in OpenMP or alternative programming paradigms, such as OpenCL, demonstrate that applications can be written (often without separate code paths for different architectures) in a way to easily migrate between different CPUs and GPUs and vendors while preserving correctness, however usually such migration results in severe performance drops [39][40][41] . Hence, manual code refactoring is still required, to change algorithms, data layouts, parallelization strategies, etc., to fully utilize any given 3/10 architecture.…”
Section: Complexity Trap and Performance Portability Mythmentioning
confidence: 99%