Enabling virtual wafer CD (WCD) using inverse pattern rendering (IPR) of mask CD-SEM images

Abstract

A wafer's printed CD error can be impacted by unaccounted mask making process variation. Unaccounted mask CD and/or corner rounding alters the intended drawn mask pattern contributing to a wafer's printed CD error. During OPC wafer calibration, average mask bias and corner rounding are accounted for in the OPC model, but random local mask making process variations or mask-to-mask variations can be difficult to account in such model calibration. Thus when a wafer's CD has error, it can be difficult to determine if the general root cause was due to mask or wafer or both. An in-line monitoring application has been developed to extract accurate mask CD and rendered mask polygon from collected mask CD-SEM images. Technical information will be presented on the challenges of accurately extracting information from SEM images. In particular, discussions include SEM image calibration, contour extraction, inverse pattern rendering, and general image processing to account for mask SEM aberrations (translation, rotation, & dilation), tool-to-tool variation, vendor-to-vendor variation, run-to-run variation, and dark/bright field pattern-to-pattern variation. After accurate mask SEM contours are obtained, lithographic simulations are performed on extracted polygon contours to determine the impact of mask variation on wafer CD. This paper will present detail information about the Inverse Pattern Rendering (IPR) capabilities developed for a virtual Wafer CD (WCD) application and its results, which is proven to achieved 0.5 nm accuracy across multiple critical layers from 28 nm to 40 nm nodes on multiple CD-SEM tools over multiple mask shop locations.

Inverse lithography technology: 30 years from concept to practical, full-chip reality

“…Luminescent continued working on computational inspection and metrology technologies to enable mask inspection, mask review, and mask repair ready for ILT masks, until it was acquired by KLA in 2012, and TSMC EBO presented a number of papers together with Luminescent showing such capabilities deployed in production. [92][93][94][95][96][106][107][108][109][110][111][112][113][114] ILT was the topic of panel discussion at the SPIE Photomask Technology Conference for two consecutive years in 2015 and 2016. The industry also recognized the issue of using VSB mask writers to write curvilinear ILT masks.…”