Encrypted computing: Speed, security and provable obfuscation against insiders

Abstract

Abstract-Over the past few years we have articulated theory that describes 'encrypted computing', in which data remains in encrypted form while being worked on inside a processor, by virtue of a modified arithmetic. The last two years have seen research and development on a standards-compliant processor that shows that near-conventional speeds are attainable via this approach. Benchmark performance with the US AES-128 flagship encryption and a 1 GHz clock is now equivalent to a 433 MHz classic Pentium, and most block encryptions fit in AES's place. This summary article details how user data is protected by a system based on the processor from being read or interfered with by the computer operator, for those computing paradigms that entail trust in data-oriented computation in remote locations where it may be accessible to powerful and dishonest insiders. We combine: (i) the processor that runs encrypted; (ii) a slightly modified conventional machine code instruction set architecture with which security is achievable; (iii) an 'obfuscating' compiler that takes advantage of its possibilities, forming a three-point system that provably provides cryptographic 'semantic security' for user data against the operator and system insiders.

Fully encrypted high-speed microprocessor architecture: the secret computer in simulation

“…The modifications not only put aside those instructions used explicitly in the attack, but they also formally generate arbitrarily many equally plausible numerical interpretations of the inputs to and outputs from each instruction, differing by a and b respectively, in the eyes of an attacker who does not yet know the encryption. The argument of Proposition 2 of this paper then may be extended to any program in the modified RISC instruction set (Breuer et al, 2017a).…”

“…In further work since this paper was submitted, we have extended the theory in Section 6, introducing in Breuer et al (2017a) a modified RISC instruction set that covers the full range of conventional RISC instruction forms. The special feature of the modified instructions is that each embeds encrypted constants that vary the semantics.…”