2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) 2020
DOI: 10.1109/isvlsi49217.2020.00066
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Enduring Non-Volatile L1 Cache Using Low-Retention-Time STTRAM Cells

Farzane Rabiee
1
,
Mostafa Kajouyan
2
,
Newsha Estiri
3
et al.
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Cited by 5 publications
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Exploration of Design Optimizations for STTMRAM as L1 Cache

Pandey
1
,
Gopalakrishnan
2
,
Ramavath
3
2021
2021 IEEE 19th Student Conference on Research and Development (SCOReD)
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Exploration of Design Optimizations for STTMRAM as L1 Cache

Pandey
1
,
Gopalakrishnan
2
,
Ramavath
3
2021
2021 IEEE 19th Student Conference on Research and Development (SCOReD)
0
0
0
0
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CAPMIG: Coherence-Aware Block Placement and Migration in Multiretention STT-RAM Caches

Manohar
1
,
Kapoor
2
2023
IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.
4
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1
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TVTAC: Triple Voltage Threshold Approximate Cache for Energy Harvesting Nonvolatile Processors

Hosseininia,
Salahvarzi,
Monazzah
2024
IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.
0
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