AgradecimientosAgradezco a todos los profesores y compañeros que de una u otra forma han colaborado en el desarrollo de esta tesis. Y en especial, a mi director José Simó cuya orientación, apoyo y susánimos han sido fundamentales para la realización de este trabajo.Igualmente agradezco a los miembros del Grupo de Informática Industrial del DISCA, con especial cariño a Alfons, Paco y Pascual, por su colaboración y acogimiento durante mi formación y desarrollo de esta investigación.A mis padres, Osvaldo e Idda, a Laura, Lucas y Noa por toda la paciencia, comprensión y motivación inyectada para la culminación de este proyecto.
III
AbstractThe development of embedded systems in industrial sectors such as railway, aerospace and automotive are based on Critical Real-Time Embedded Systems (CRTES). These systems face new challenges and demand related to increase of dependability, intelligence, connectivity, cost-size-volume reduction and energy efficiency. In this last topic is where this thesis expects to have a higher contribution.The global energy consumption can be combined with others criteria such as schedulability, communication delays and control application correctness, which contribute to determine the dynamic code movement and on-line load balancing in a system. The main goal of this thesis is the development of mechanisms for the management and optimization of energy consumption. These mechanisms are presented in the context of a distributed real-time control system and from the perspective of control kernel middleware. Let's consider a dynamic environment where an embedded and networked system operates with the support of task migration and processor frequency scaling. Assuming that the system knows where and when it must allocate tasks, we must perform feasibility analyses when each task arrives and departs on the affected embedded units. This guarantees that the temporal requirements of the system will be accomplished during the task allocation phase or delegation of tasks. Additionally, a new processor speed (frequency scaling) should be also computed to enable the system to adapt itself to the new computational workload and reduce energy consumption. And in this last is where the proposed algorithms in this work have their higher relevance. Although some authors have carried out these two phases (feasibility analysis and frequency scaling computation) separately, these analyses are strongly related and in some cases can be performed together.In this thesis, we present novel algorithm that perform feasibility analyses and compute new processor static frequencies based on dynamic voltage and frequency scaling techniques (DVFS). The frequency obtained as result of applying the algorithm proposed is the minimum processor frequency that minimizes CPU energy consumption while guaranteeing the fulfilment of real-time system constraints. The algorithm uses fixed priority scheduling schemes with deadlines less than, or equal to, the period of the tasks. Other propose of this algorithm is the use on-line during th...