Energy‐efficient CPU frequency control for the Linux system

Abstract

Efficiency of energy usage in computing systems improves, however, still not at the rate matching the climbing demand for computing capacity. To address this urging problem, computing elements of the latest generation, that is, CPUs/graphics processing units, memory units, and network interface cards, have been designed to operate in multiple modes with differentiated energy consumption levels. Mode switching and high-frequency performance monitoring functions have also been exposed by co-designed abstract programming interfaces. The challenge of energy-efficient computing is to develop hardware control mechanisms taking advantage of the new capabilities. This paper aims at giving an insight into the structure of optimal energy-aware CPU frequency scaling rules. It gives a characterization of solutions to the optimal control problem of energy-efficient real-time packet inspection performed by a Linux server. A class of CPU frequency switching rules, exploiting dynamic voltage and frequency scaling mechanisms, is constructed based on experimentally identified model of server operations. The control rules are demonstrated to outperform the default CPU frequency scaling governor for the Linux kernel, both in terms of achievable power savings and service quality. 421Agency's 50 GFLOPS/W goal ¶ by year 2020 [4,5]. Indeed, limiting power consumption in data centers has become an important engineering problem [6][7][8].Average CPU utilization of a server in data center rarely approaches 100%, most of the time oscillating somewhere between 10% and 50% [9]. Over-provisioning of computing capacity, strongly correlated with the running CPU frequency, has been applied as a sound strategy to eliminate potential breakdowns caused by sudden workload fluctuations or internal disruptions, for example, hardware or software faults. Unfortunately, although efficient from the point of view of service quality, the strategy may be a significant source of energy waste. The challenge of energy-efficient CPU frequency scaling, addressed in the present paper, is therefore to design control rules reducing power consumption subject to quality of service constraints in highly stochastic environment of a server operating system.Dynamic voltage and frequency scaling (DVFS) mechanisms have been commonly used to reduce power usage in routers and application servers. Translation of the commands responsible for the CPU frequency control in the Linux system has been provided by the cpufreq kernel module [10]. The module allows to adjust performance of CPU by activating a desired control policy implemented as a CPU governor. Typically, the calculated control inputs are mapped to admissible performance P-states, as described by the Advanced Configuration and Power Interface standard || , and passed to a processor driver (e.g., acpi_cpufreq). The sleeping state, or Advanced Configuration and Power Interface C-state, which CPU enters during idle periods, is independently and simultaneously determined by the cpuidle kernel module [11].Recent versions of ...

Why High-Performance Modelling and Simulation for Big Data Applications Matters

“…The goal is to reduce the gap between the capacity provided by distributed computing environments and application requirements, especially during low workload periods. Various efforts are undertaken to develop energy efficient task scheduling and balancing of loads [8][9][10][11] and frequency scaling techniques [12][13][14].…”

Infrastructure and Energy Conservation in Big Data Computing: A Survey

“…• cpufreq governor [61], [56], [72]. In [73], a design of a feedback controller for solving the problem of low utilization of servers in a data-center running I/O-intensive applications is proposed.…”

Energy Aware Data Centers and Networks: a Survey

“…Unified interfaces, such as the green abstraction layer (GAL) [13], [14], are the next generation solution having the form of a generalized interface providing the functionality of setting energy states for all computer system components and also, which is another in- 2 Running average power limit (RAPL) provides access to various processor registers containing, inter alia, measurements of power consumed by processor components, cache memory, etc. While the original aim was primarily to provide power capping, these measurements are precise, short term averages relevant for designing dynamic processor frequency controllers [7]. novation, of querying energy-aware capabilities of the said components.…”

“…In such a case it is possible to construct specialized power governors suitable for specialized usage scenarios, e.g. a web server, large scale computations or network traffic filtering [7], [8], [17]. The savings achieved by the algorithm presented in [7] are attained mostly by exploiting identified dynamics of applications running, and thus designing a control law that makes it possible to adequately react to load changes.…”

“…a web server, large scale computations or network traffic filtering [7], [8], [17]. The savings achieved by the algorithm presented in [7] are attained mostly by exploiting identified dynamics of applications running, and thus designing a control law that makes it possible to adequately react to load changes. A discussion concerned with the possibility of designing PI and PID processor frequency controllers may be also found in [18].…”