Energy-Efficient Exposed Datapath Architecture With a RISC-V Instruction Set Mode
Kari Hepola,
Joonas Multanen,
Pekka Jääskeläinen
Abstract:Transport triggered architectures (TTAs) follow the static programming model of very long instruction word (VLIW) processors but expose additional information of the processor datapath in the programming interface, which enables low-level code optimizations but results in lower code density. Multi-instruction-set architectures add flexiblity via their ability to switch instruction sets during execution. The added flexibility is interesting for VLIW-style processors because it enables reducing the large instruc… Show more
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