2021
DOI: 10.1109/access.2021.3109875
|View full text |Cite
|
Sign up to set email alerts
|

Energy-Efficient FPGA Accelerator With Fidelity-Controllable Sliding-Region Signal Processing Unit for Abnormal ECG Diagnosis on IoT Edge Devices

Abstract: Recently, with an increase in the number of healthcare devices, studies measuring and diagnosing electrocardiogram (ECG) signals in daily life are emerging. ECG signal analysis is an essential study area that can diagnose fatal heart abnormalities in humans at an early stage. Conventional signal detection uses one reference beat to diagnose ECG signals; thus, the detection rate is different for each person. In this study, we design a system that can learn a reference beat and diagnose ECG signals in real-time … Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
3
1
1

Citation Types

0
7
0

Year Published

2022
2022
2024
2024

Publication Types

Select...
6
2
1

Relationship

2
7

Authors

Journals

citations
Cited by 11 publications
(7 citation statements)
references
References 22 publications
0
7
0
Order By: Relevance
“…The PU array ran in a pipeline to generate efficient calculation results, which were then quantized using a Bit-width Converter. Lee et al (2021) introduced a system for real time ECG diagnosis using hardware accelerators and an approximated template-based algorithm. This personalized approach improves detection rates and reduces memory usage compared to existing methods.…”
Section: Stage 3: Classificationmentioning
confidence: 99%
“…The PU array ran in a pipeline to generate efficient calculation results, which were then quantized using a Bit-width Converter. Lee et al (2021) introduced a system for real time ECG diagnosis using hardware accelerators and an approximated template-based algorithm. This personalized approach improves detection rates and reduces memory usage compared to existing methods.…”
Section: Stage 3: Classificationmentioning
confidence: 99%
“…Field Programmable Gate Array (FPGA) has become one of the most mainstream choices for accelerating CNN inference due to its excellent performance achieved on CNN inference tasks. In this work, Zynq architecture was adopted to construct an sEMG gesture and force level recognition system, by combining the advantages of high performance of the dedicated accelerator and flexibility of the general-purpose accelerator [18].The FPGA core of the Zynq architecture is programmable and can be upgraded and extended according to actual needs; meanwhile the ARM core can be used for signal pre-processing to reduce data transfer latency and enhance computational efficiency. FPGA can accelerate the computation of DL models through parallel computing and highly optimized hardware architecture, resulting in fast inference speed and low latency.…”
Section: A System Overviewmentioning
confidence: 99%
“…Separating code based on the on-demand execution code enhances the independence of the edge and server code, enabling metamorphic program execution [16,17]. From a resource virtualization perspective, even if the code stored on the edge device remains unchanged, the behavior of the program executed at the edge can be changed if the code stored on the server is modified.…”
Section: Related Workmentioning
confidence: 99%