Highly flexible, electrically conductive freestanding graphene membranes hold great promise for vibration-based applications. This study focuses on their integration into mainstream semiconductor manufacturing methods. We designed a two-mask lithography process that creates an array of freestanding graphene-based variable capacitors on 100 mm silicon wafers. The first mask forms long trenches terminated by square wells featuring cone-shaped tips at their centers. The second mask fabricates metal traces from each tip to its contact pad along the trench and a second contact pad opposite the square well. A graphene membrane is then suspended over the square well to form a variable capacitor. The same capacitor structures were also built on 5 mm by 5 mm bare dies containing an integrated circuit underneath. We used atomic force microscopy, optical microscopy, and capacitance measurements in time to characterize the samples.