2016 IEEE 17th International Symposium on High Assurance Systems Engineering (HASE) 2016
DOI: 10.1109/hase.2016.30
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Engineering Adaptive Fault-Tolerance Mechanisms for Resilient Computing on ROS

Abstract: International audienceSystems are expected to evolve during their service life in order to cope with changes of various natures, ranging from fluctuations in available resources to additional features requested by users. For dependable embedded systems, the challenge is even greater, as evolution must not impair dependability attributes. Resilient computing implies maintaining dependability properties when facing changes. Resilience encompasses several aspects, among which evolvability, i.e., the capacity of a… Show more

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Cited by 14 publications
(6 citation statements)
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References 13 publications
(19 reference statements)
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“…This framework is also of interest to compose FTMs on a case-by-case basis without any impact on the functional software. More details can be found in [14]. We are convinced that AFT is essential for a safe management of over-the-air updates of ADAS.…”
Section: Conclusion and Prospectivesmentioning
confidence: 95%
“…This framework is also of interest to compose FTMs on a case-by-case basis without any impact on the functional software. More details can be found in [14]. We are convinced that AFT is essential for a safe management of over-the-air updates of ADAS.…”
Section: Conclusion and Prospectivesmentioning
confidence: 95%
“…Today, many robotic systems use an asynchronous architecture for message delivery based on the publish-subscribe paradigm. An example is PX4 [5] and ROS [6]. These systems are easier to use and provide many benefits for quickly adding new interfaces and components through a loosely coupled architecture.…”
Section: B Publish-subscribe Robotic Systemsmentioning
confidence: 99%
“…Different links between processors have different data transmission rate. The transmission rate of a link (namely bandwidth) is measured in bits per second [35] [36]. Suppose communication bandwidth between any two processors is symmetrical, and we use notation B ij to represent the communication bandwidth from processor p i to processor p j .…”
Section: A System Modelmentioning
confidence: 99%