Engineering the Size Distributions of Ordered GaAs Nanowires on Silicon

Vukajlovic-Plestina, Jelena; Kim, Wonjong; Dubrovski, Vladimir G.; Tütüncüoǧlu, Gözde; Lagier, Maxime; Potts, Heidi; Friedl, Martin; Morral, Anna Fontcuberta i

doi:10.1021/acs.nanolett.7b00842

Cited by 52 publications

(77 citation statements)

References 39 publications

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“…This high contact angle is a key requirement for NW growth [53]. Contact angles of this value have previously been achieved in successful NW growth by tailoring the native oxide thickness, or by filling a nanohole completely [17,53]. In our case, the droplet size matches closely with the silicon open area size and simultaneously exhibits a high contact angle ( figure 3(b)).…”

Section: Resultssupporting

confidence: 64%

“…A magnified tilted AFM image of a single nanohole shows that the Ga droplets are centered inside their holes ( figure 3(b)) and exhibit a high contact angle (higher than 85°). This high contact angle is a key requirement for NW growth [53]. Contact angles of this value have previously been achieved in successful NW growth by tailoring the native oxide thickness, or by filling a nanohole completely [17,53].…”

Section: Resultsmentioning

confidence: 99%

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Growth of nanowire arrays from micron-feature templates

Jurgensen¹,

Mikulik²,

Kim³

et al. 2019

Nanotechnology

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Here, we present a two-step annealing procedure to imprint nanofeatures on SiO 2 starting from metallic microfeatures. The first annealing transforms the microfeatures into gold nanoparticles and the second imprints these nanoparticles into the SiO 2 layer with nanometric control. The resulting nanohole arrays show a high ensemble uniformity. As a potential application, the nanohole mask is used as a selective mask for the Ga self-assisted growth of GaAs nanowires (NWs). Thus, for the first time, a successful implementation of nano-self-imprinting that links high-throughput microlithography with bottom-up NW growth is shown. The beneficial hole morphology of the SiO 2 mask promotes high Ga droplet contact angles with the silicon substrate and the formation of single droplets in the mask holes. This droplet predeposition configuration enables a high vertical yield of NWs. Thus, this article describes a new protocol to grow NW devices that combines simultaneously nanosized holes and parallel processing.

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Section: Resultssupporting

confidence: 64%

Section: Resultsmentioning

confidence: 99%

Growth of nanowire arrays from micron-feature templates

Jurgensen¹,

Mikulik²,

Kim³

et al. 2019

Nanotechnology

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“…To avoid Au contamination, self‐catalysis has been combined with NIL to fabricate well‐positioned arrays of GaAs nanowires with challenges . In a similar way to the SA‐MOVPE, EBL was successfully used to pattern hole openings in the substrate and positioning droplets, promoting a VLS growth rather than the vapor–solid growth expected for SA‐MOVPE . However, these VLS‐based methods are reliant on the liquid catalyst and the composition of the nanowires grown is limited by the solubilities of the relevant precursors within the liquid catalyst.…”

Section: Challenges In Nanowire Growthmentioning

confidence: 99%

Engineering III–V Semiconductor Nanowires for Device Applications

Wong‐Leung

Yang

et al. 2019

Advanced Materials

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of silicon along the direction. Hiruma et al. [4] demonstrated that GaAs NWs-then termed whisker growth can be grown by metal-organic chemical vapor deposition (MOCVD) with a similar VLS mechanism. A spate of papers from the same group clearly identified that this process could be extended to InAs NWs and the group was successful in growing a GaAs p-n junction (see ref.[5] for a review). This concept was further expanded in NW heterostructures by Samuelson and co-workers in Lund. [6] This whole sequence of research findings triggered the growing new research field of semiconductor NWs which peaked in 2009 with a vast number of publications. Figure 1 is a plot of the number of publications published per year in the field of "semiconductor nanowires" for over two decades from Clarivate Analytics. Since 2009, the number of publications within this field is about 1000 per year. Herein, we review our recent NW work and expand on our future directions within this field. III-V semiconductor nanowires offer potential new device applicationsbecause of the unique properties associated with their 1D geometry and the ability to create quantum wells and other heterostructures with a radial and an axial geometry. Here, an overview of challenges in the bottom-up approaches for nanowire synthesis using catalyst and catalyst-free methods and the growth of axial and radial heterostructures is given. The work on nanowire devices such as lasers, light emitting nanowires, and solar cells and an overview of the top-down approaches for water splitting technologies is reviewed. The authors conclude with an analysis of the research field and the future research directions.

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“…A large variation of the NW diameter implies that the diameters of the original Ga droplets exhibit a broad distribution. Also, the simplest explanation for a pronounced inhomogeneity of the NW length is that NWs nucleate at different times [35,36], leading to broader length distributions for longer incubation times. Conversely, NWs that are very homogeneous in length and diameter, as found below 620 °C, must have nucleated from similar droplets and almost simultaneously.…”

Section: Fig 1(a) Presents the Variation Of The Incubation Time Withmentioning

confidence: 99%

Analysis of incubation time preceding the Ga-assisted nucleation and growth of GaAs nanowires on Si(111)

Bastiman

Küpers

Somaschini

et al. 2019

Phys. Rev. Materials

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The incubation time preceding nucleation and growth of surface nanostructures is interesting from a fundamental viewpoint but also of practical relevance as it determines statistical properties of nanostructure ensembles such as size homogeneity. Using in situ reflection high-energy electron diffraction, we accurately deduce the incubation times for Ga-2 assisted GaAs nanowires grown on unpatterned Si(111) substrates by molecular beam epitaxy under different conditions. We develop a nucleation model that explains and fits very well the data. We find that, for a given temperature and Ga flux, the incubation time always increases with decreasing As flux and becomes infinite at a certain minimum flux, which is larger for higher temperature. For given As and Ga fluxes, the incubation time always increases with temperature and rapidly tends to infinity above 640 °C under typical conditions. The strong temperature dependence of the incubation time is reflected in a similar variation of the nanowire number density with temperature. Our analysis provides understanding and guidance for choosing appropriate growth conditions that avoid unnecessary material consumption, long nucleation delays, and highly inhomogeneous ensembles of nanowires. On a more general ground, the existence of a minimum flux and maximum temperature for growing surface nanostructures should be a general phenomenon pertaining for a wide range of material-substrate combinations.

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Engineering the Size Distributions of Ordered GaAs Nanowires on Silicon

Cited by 52 publications

References 39 publications

Growth of nanowire arrays from micron-feature templates

Growth of nanowire arrays from micron-feature templates

Engineering III–V Semiconductor Nanowires for Device Applications

Analysis of incubation time preceding the Ga-assisted nucleation and growth of GaAs nanowires on Si(111)

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