Enhancement of device characteristics of CNT-TFET: Role of electrostatic doping and work function engineering

Ossaimee, Mahmoud; Salah, Ahmed; Gamal, S.H.; Shaker, Ahmed; Salem, Marwa S.

doi:10.1016/j.asej.2022.101848

Cited by 2 publications

(1 citation statement)

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“…Numerous device architecture and optimization approaches such as strain material, heterostructure, vertical shaped, and twodimensional material of carbon allotropes have been explored in present days to fix the major bottleneck of a TFET low On-current [10,11,12,13,14,15]. It has been informed that two-dimensional (2D) material of carbon nanotube (CNT), graphene material, and graphene nanoribbon (GNR) shows a better performance in DC and analog/RF parameters over silicon-based TFET [15,16,17,18].…”

Section: Introductionmentioning

confidence: 99%

Device and Circuit-Level Performance Evaluation of DG-GNR-DMG Vertical Tunnel FET

Liana

Tripathy

Choudhuri

et al. 2023

Preprint

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This work presents the comparative study of Graphene Nanoribbon (GNR) based channel Double Gate (DG) Dual Gate Material (DMG) Vertical tunnel FET performance with all Silicon material TFET. The two-dimensional material GNR has been proposed in the channel material to enhance the device performance due to its low bandgap, high mobility, and high saturation velocity. The proposed device's DC, RF, and circuit-level performance analysis has been carried out for the first time. GNR-based channel VTFET shows a better average subthreshold swing (SSAVG ) of 16 mV/decade compared to Si VTFET (36 mV/decade) at a drain voltage VDS=0.5 V. The study of temperature effects on the DC parameters is also included along with the analog/RF FOMs for the proposed two structures. In addition, the performances are compared with other reported works; it is observed that DG-GNR-DMG-VTFET offers better results than Si-based VTFET and other said TFET work. Finally, circuit-level analysis has been done by designing inverter and ring oscillator circuits for the proposed structures, and performance is compared in these two devices. The market-available Silvaco ATLAS TCAD simulator has been used for device-level simulation. Further, circuit-level analysis has been carried out in the Cadence Virtuoso tool using a look-up table-based Verilog-A model.

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