Enhancement technique of insertion loss and linearity for PIN diode switches

Abstract

Design and analysis of insertion loss and linearity enhancement technique for PIN diode RF switches are presented. Measurements show a 12.5% insertion loss improvement by optimizing anode-to-cathode distance, a 3.29% reduction of intrinsic resistance by choosing the octagonal shape over the square one, and a 1 dB P 1dB improvement by using the new cathode biased technique. A low insertion loss and high isolation single-pole double-throw (SPDT) switch has been built with the proposed PIN diode.