Enhancements for Hardware-based IEEE802.1CB embedded in Automotive Gateway System-on-Chip

Abstract

In this work, authors present a Hardware based strategy for IEEE802.1CB Network Reliability embedded in Automotive Gateways (GW). It is a new approach for HW efficient and cost-effective integration of Frame Replication and Elimination for Reliability (FRER) algorithm within automotive Network-on-Chip / System-on-Chip. In essence, it is a HW architecture that permits to manage the complex integration of IEEE802.1CB within In-Vehicle Networks. The FRER algorithm is split into smaller functionalities which are allocated across the different processing stages of the GW, maximizing device and network performance. The proposed architecture has a strong focus on Functional Safety, introducing important enhancements to overcome IEEE802.1CB limitations identified in the state of the art: data content verification, meaningful network diagnosability and performance verification. It moves a step forward towards fail operational systems and the compliance with ISO 26262, contributing to future autonomous driving networking solutions.

Elastic Gateway Functional Safety Architecture and Deployment: A Case Study

“…For this, the processing controller handles the interconnection between the intermediate queues and the processing stage allowing for interconnecting any queue with any processing task, providing thus maximum flexibility in terms of parallel processing. An example of how a safety related feature (IEEE802.1CB) is deployed within the eGW architecture is given in [79]. The output of the processing stage can go to the egress stage, or back through the loopback path, if further processing is required.…”