2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA) 2020
DOI: 10.1109/isca45697.2020.00050
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Enhancing and Exploiting Contiguity for Fast Memory Virtualization

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Cited by 28 publications
(16 citation statements)
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References 57 publications
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“…Speculation. In speculation-based approaches [19], [21], [52], [53], a missing translation is predicted, the processor continues executing instructions speculatively, and a validation page walk is performed in the background. Those approaches are affected by the system state (OS, fragmentation) as they depend on allocating contiguous virtual pages to contiguous physical pages to the missing address translations.…”
Section: E Interaction With Os Page Replacement Policymentioning
confidence: 99%
See 1 more Smart Citation
“…Speculation. In speculation-based approaches [19], [21], [52], [53], a missing translation is predicted, the processor continues executing instructions speculatively, and a validation page walk is performed in the background. Those approaches are affected by the system state (OS, fragmentation) as they depend on allocating contiguous virtual pages to contiguous physical pages to the missing address translations.…”
Section: E Interaction With Os Page Replacement Policymentioning
confidence: 99%
“…Prior work has quantified the cost of TLB performance [6]- [9] and has proposed approaches to mitigate the overheads of address translation. These approaches mainly fall into three categories: (i) increasing TLB reach by introducing hardware and OS support [6], [10]- [15], (ii) reducing the latency of TLB misses [7], [16]- [21], and (iii) reducing TLB misses by prefetching Page Table Entries (PTEs) [22]- [25]. In this paper we focus on the last category, TLB prefetching, that operates at the microarchitecture level, is independent of the system state, relies only on the memory access pattern of the application, and does not disrupt the existing virtual memory subsystem.…”
Section: Introductionmentioning
confidence: 99%
“…Prefetched Address Translation [29] (ASAP) utilises layout configurations in the operating system to approximate direct translation, and thus speculatively break linked-list chains in two-dimensional radix tables. Alverti et al [6] rearrange virtual mappings to better provide locality, for prediction.…”
Section: Virtualisation and Translationmentioning
confidence: 99%
“…Pham et al applied speculation to glue together regions of large pages that have been splintered by the hypervisor [38]. Alverti et al used contiguous allocations and a page table walk predicting mechanism along with speculation to minimize page walk latencies [11]. The above methods could be applied to our approach to reduce latencies as well.…”
Section: B Related Workmentioning
confidence: 99%