Enhancing Productivity by Continuously Improving Standard Compact Models

Abstract

The design of an integrated circuit requires the efforts of a large number of people with a wide range of skills. The compact model is a communication tool by which the designer of transistors, resistors and other circuit elements tells the designer of circuits how the circuit elements behave. Without this information the circuit design would be a trial and error process and modern electronics would be impossible. High quality, industry standard compact models enhance the productivity of the industry by enabling precise communication between any device design team, and any circuit design team, anywhere in the world.To be useful for leading edge design the compact model must keep up with the pace of semiconductor technology innovation. This is the great challenge for the Compact Model Council. It is only possible because the CMC creates collaboration between academics, semiconductor foundries, EDA vendors and circuit designers.

Compact modeling and simulation of PD-SOI MOSFETs: Current status and challenges

“…Standardization helps ensure consistency in model implementation across circuit simulator platforms [36]. In addition, model developers receive recognition and academic funding for their contributions and circuit designers benefit from improved model accuracy and features that are honed through detailed review during in the standardization process [37]. Today the compact model standards-setting body is the Compact Model Council (CMC) [38], which is hosted by the Government Electronics and Information Association (GEIA).…”

Accurate Simulation of Transistor-Level Variability for the Purposes of TCAD-Based Device-Technology Cooptimization

“…The purpose of DTCO is to establish a link between transistor and technology optimization for a particular implementation of a circuit(s) and to quantify the impact of this optimization on the corresponding design performance and yield. To deliver an efficient TCAD-based DTCO, closing the loop between physical technology and transistor simulation, compact model extraction, and corresponding circuit simulation is imperative [10], [11].…”