2021
DOI: 10.1007/s10703-022-00396-6
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Equivalence checking and intersection of deterministic timed finite state machines

Abstract: There has been a growing interest in defining models of automata enriched with time, such as finite automata extended with clocks (timed automata). In this paper, we study deterministic timed finite state machines (TFSMs), i.e., finite state machines with a single clock, timed guards and timeouts which transduce timed input words into timed output words. We solve the problem of equivalence checking by defining a bisimulation from timed FSMs to untimed ones and vice versa. Moreover, we apply these bisimulation … Show more

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Cited by 3 publications
(3 citation statements)
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“…Real-time software systems are examples where the state transition may happen due to a timeout. Such systems can be represented by a tFSMs [31], [32], [33] with a single clock. tFSMs have been used as models in many fields, such as in real-time scheduling and optimisation as well as modelchecking, and there are tools for test-case generation from timed FSMs.…”
Section: Problem Definition and Research Questionsmentioning
confidence: 99%
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“…Real-time software systems are examples where the state transition may happen due to a timeout. Such systems can be represented by a tFSMs [31], [32], [33] with a single clock. tFSMs have been used as models in many fields, such as in real-time scheduling and optimisation as well as modelchecking, and there are tools for test-case generation from timed FSMs.…”
Section: Problem Definition and Research Questionsmentioning
confidence: 99%
“…Approaches for test derivation from tFSMs are investigated in many papers [31], [35], [36], [37]. A tFSM can be complete or partial and flattened into an FSM [33]. Thus, test derivation from a given tFSM, and the generation of related RSs and DSs, can be carried out using traditional FSM-based methods from the flattened FSM [36], [37].…”
Section: Problem Definition and Research Questionsmentioning
confidence: 99%
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