EQZ-LDO: A Near-Zero EDP Overhead, &gt;10M-Attack-Resilient, Secure Digital LDO featuring Attack-Detection and Detection-Driven Protection for a Correlation-Power-Analysis-Resilient IoT Device

Kim, Sung Justin; Kim, Dongkwun; Sharma, Akanksha; Seok, Mingoo

doi:10.23919/vlsicircuits52068.2021.9492345

Cited by 10 publications

(4 citation statements)

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“…essentially consists in revealing changes in the off-chip supply impedance seen from the chip [87]- [89]. In other words, detection of power analysis attacks requires the inclusion of physical context awareness around the supply pad.…”

Section: On-chip Sensorization For Non-invasive Physical Attack Detec...mentioning

confidence: 99%

“…Among the techniques for supply impedance monitoring summarized in Table II, [87] introduces a digital low drop-out regulator (DLDO) embedding some attack detection capability by monitoring the resistive component of the supply resistance. In other words, the DLDO includes a resistor meter and allows to check if a resistor has been inserted at any point of time, as the simplest form of probing device.…”

Section: On-chip Sensorization For Non-invasive Physical Attack Detec...mentioning

confidence: 99%

“…The effect of global process variations, moderately fast voltage fluctuations and temperature variations is suppressed through ratiometric acquisitions with and without current perturbation, when exciting the supply impedance for its quantification. As shown in Table II, the solution in [90] eliminates the restriction to resistance [87] and inductance monitoring [88], and expands the bandwidth by 2.5X over [89]. Compared to solutions suitable for supply monitoring, the normalized area of [90] is close to [87], and 21X smaller than [89].…”

Section: On-chip Sensorization For Non-invasive Physical Attack Detec...mentioning

confidence: 99%

“…As shown in Table II, the solution in [90] eliminates the restriction to resistance [87] and inductance monitoring [88], and expands the bandwidth by 2.5X over [89]. Compared to solutions suitable for supply monitoring, the normalized area of [90] is close to [87], and 21X smaller than [89]. In particular its area fits a pair of supply pads and hence allows its integration underneath the supply pads, introducing near-zero area overhead for ubiquitous adoption.…”

Section: On-chip Sensorization For Non-invasive Physical Attack Detec...mentioning

confidence: 99%

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Aggressive Design Reuse for Ubiquitous Zero-Trust Edge Security—From Physical Design to Machine-Learning-Based Hardware Patching

Alioto

2023

IEEE Open J. Solid-State Circuits Soc.

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This work presents an overview of challenges and solid pathways towards ubiquitous and sustainable hardware security in next-generation silicon chips at the edge of distributed and connected systems (e.g., IoT, AIoT). As first challenge, the increasingly connected nature and the exponential proliferation of edge devices is unabatingly increasing the overall attack surface, making attacks easier and mandating ubiquitous security down to each edge node. At the same time, the necessity to incorporate zero-trust policies in large-scale distributed systems requires a complete set of security primitives for hardware-backed authentication, and a higher degree of physical context awareness (including primitives detecting the onset of physical attacks). Thus, making the inclusion of such security primitives economically sustainable even in low-end devices is a second key challenge. As third challenge, the ever-changing vulnerability landscape and the need for increased chip longevity in distributed systems requires security assurance methods that are sustainable and adaptive across the entire chip lifecycle. In this work, design principles and promising directions to enable ubiquitous and sustainable security capabilities along with physical awareness are discussed. Such achievements require a fundamental rethinking of design methodologies to enable aggressive design and resource reuse (e.g., area, power, design effort), along with low-cost on-chip sensorization and intelligence for physical attack detection. Such rethinking inevitably crosses over the traditional design abstractions, and requires innovation from the physical to the algorithmic level. At the physical and circuit level, design and resource reuse is enabled by immersed-inlogic and in-memory security approaches. At the algorithm level, "hardware patching" is introduced and exemplified to show that run-time intelligence (machine learning) allows security capabilities to adapt and improve over time, as typical of security patching in software. Sensing techniques to detect attacks in situ from non-invasive to invasive are illustrated, while still preserving fully-automated design approaches. Overall, the above design principles are expected to push security capabilities in distributed systems to a new level, ultimately making the edge more intelligent and self-reliant, and security measures more distributed.

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Section: On-chip Sensorization For Non-invasive Physical Attack Detec...mentioning

confidence: 99%

Section: On-chip Sensorization For Non-invasive Physical Attack Detec...mentioning

confidence: 99%

Section: On-chip Sensorization For Non-invasive Physical Attack Detec...mentioning

confidence: 99%

Section: On-chip Sensorization For Non-invasive Physical Attack Detec...mentioning

confidence: 99%

See 2 more Smart Citations

Aggressive Design Reuse for Ubiquitous Zero-Trust Edge Security—From Physical Design to Machine-Learning-Based Hardware Patching

Alioto

2023

IEEE Open J. Solid-State Circuits Soc.

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Review, Survey, and Benchmark of Recent Digital LDO Voltage Regulators

Wang

Kim

Bowman

et al. 2022

2022 IEEE Custom Integrated Circuits Conference (CICC)

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Sniff-SAR: A 9.8fJ/c.-s 12b secure ADC with detectiondriven protection against power and EM side-channel attack

Chen

Chandrakasan

Lee

2023

2023 IEEE Custom Integrated Circuits Conference (CICC)

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EQZ-LDO: A Near-Zero EDP Overhead, >10M-Attack-Resilient, Secure Digital LDO featuring Attack-Detection and Detection-Driven Protection for a Correlation-Power-Analysis-Resilient IoT Device

Cited by 10 publications

References 0 publications

Aggressive Design Reuse for Ubiquitous Zero-Trust Edge Security—From Physical Design to Machine-Learning-Based Hardware Patching

Aggressive Design Reuse for Ubiquitous Zero-Trust Edge Security—From Physical Design to Machine-Learning-Based Hardware Patching

Review, Survey, and Benchmark of Recent Digital LDO Voltage Regulators

Sniff-SAR: A 9.8fJ/c.-s 12b secure ADC with detectiondriven protection against power and EM side-channel attack

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