17th International Conference on VLSI Design. Proceedings.
DOI: 10.1109/icvd.2004.1260918
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Error correction in pipelined ADCs using arbitrary radix calibration

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“…Also, the reduced gain requires a cyclic operation of greater than N cycles. A more computationally intensive digital error correction algorithm proposed in [3] is used,…”
Section: Introductionmentioning
confidence: 99%
“…Also, the reduced gain requires a cyclic operation of greater than N cycles. A more computationally intensive digital error correction algorithm proposed in [3] is used,…”
Section: Introductionmentioning
confidence: 99%