2020 IEEE 26th International Symposium on on-Line Testing and Robust System Design (IOLTS) 2020
DOI: 10.1109/iolts50870.2020.9159746
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Error Modeling for Image Processing Filters accelerated onto SRAM-based FPGAs

Abstract: Image processing is today employed in a variety of application fields, including safety-and mission-critical ones. In these scenarios it is vital to carefully analyse the reliability of the designed system before deployment and, if necessary, to adopt specific hardening techniques. Two are the techniques generally employed: circuit-level fault injection and applicationlevel functional error simulation. In this paper we present a set of functional error models specific for a number of convolutionbased filters t… Show more

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Cited by 4 publications
(8 citation statements)
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“…In particular, all the datasets are obtained by means of error simulation while CNN training, evaluation and pruning exploit the TensorFlow and Keras frameworks [36]. For the datasets generation, error models are manually defined as in [37]; we performed fault injection campaigns (by means of LLFI [27]) for each filter and we extracted the recurrent distortion patterns.…”
Section: Methodsmentioning
confidence: 99%
“…In particular, all the datasets are obtained by means of error simulation while CNN training, evaluation and pruning exploit the TensorFlow and Keras frameworks [36]. For the datasets generation, error models are manually defined as in [37]; we performed fault injection campaigns (by means of LLFI [27]) for each filter and we extracted the recurrent distortion patterns.…”
Section: Methodsmentioning
confidence: 99%
“…We here adopt a strategy similar to the one proposed in [2], [9] to generate a large set of corrupted images corresponding to the adopted fault model (e.g. SEUs), target platform and image processing application being executed.…”
Section: Fault Corruption Analysismentioning
confidence: 99%
“…It receives from the host machine, through the serial connection, the input image to be used, the golden output and the mask presenting all injectable memory locations and performs a fault injection campaign by following a classical execution flow, where all injectable memory locations are corrupted one at a time, and returns i) the response for each experiment (corrupted output, not corrupted output ,or timeout), and ii) the corrupted output images to the host machine. As a final note, as already discussed in [11], numerous input images are employed during the fault injection campaign not to introduce biases in the identified error models.…”
Section: A Circuit-level Fault Injectionmentioning
confidence: 99%
“…It is indeed fundamental that the corrupted data injected in the application well represents the effects of the real possible faults, i.e., that the adopted error models are accurate. A first attempt of extracting accurate error models specific for image processing applications accelerated onto SRAM-based FPGAs has been presented in [11].…”
Section: Introduction and Related Workmentioning
confidence: 99%
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