ETA: experience with an intel xeon processor as a packet processing engine

Regnier, G.; Minturn, D.; McAlpine, G.; Saletore, Vikram A.; Foong, Annie

doi:10.1109/mm.2004.1268989

Cited by 41 publications

(27 citation statements)

References 4 publications

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“…There has been a lot of work that focusses on onloading different computation and communication related tasks such as TCP/IP processing in data centers [14,23], MPI collective operations [25], and distributed data management [30]. There has also been work that compares onloading and offloading based solutions for network communication [22].…”

Section: Related Workmentioning

confidence: 99%

ProOnE: a general-purpose protocol onload engine for multi- and many-core architectures

Lai

Balaji

Thakur

et al. 2009

Comp. Sci. Res. Dev.

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Modern high-end computing systems utilize specialized offload engines to enhance various aspects of their processing. For example, high-speed networks such as InfiniBand, Quadrics and Myrinet utilize specialized hardware to offload network processing to help improve performance. However, such hardware units are expensive, and their manufacturing complexity increases exponentially depending on the number and complexity of tasks they offload. On the other hand, the proliferation of multi-and many-core processors into the general desktop and laptop markets is increasingly driving their cost down due to the economies of scale. To take advantage of the obvious benefits of multi/many-core architectures, we propose, design and evaluate ProOnE, a general purpose Protocol Onload Engine. ProOnE utilizes a small subset of the available cores on a multi-core CPU to "onload" various tasks in a dedicated manner instead of "offloading" them to specialized hardware. The general purpose processing capabilities of multi-core architectures allow ProOnE to be designed in a flexible, extensible and scalable manner, while benefiting from the reducing costs of general-purpose CPUs. In this paper, we onload onto ProOnE, several tasks relevant to communication sub-systems such as MPI that are too complex for current hardware offload engines to support, and demonstrate significant benefits in terms of overlap of computation and communication and improved application performance.

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Section: Related Workmentioning

confidence: 99%

ProOnE: a general-purpose protocol onload engine for multi- and many-core architectures

Lai

Balaji

Thakur

et al. 2009

Comp. Sci. Res. Dev.

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“…Examples include splitting the TCP/IP stack across general purpose processors and dedicated network devices, such as network processors, FPGA-based line cards, or dedicated processors in SMP systems [2,17], or splitting the application stack as with content-based load balancing for an http server or for efficient implementations of media services. Similarly, in modern interconnection technologies, the network interfaces represent separate processing contexts with capabilities for protocol off-load, direct data placement, and OS-bypass [12,20].…”

Section: Related Workmentioning

confidence: 99%

C-CORE: Using Communication Cores for High Performance Network Services

Kumar

Gavrilovska

Schwan

et al. 2005

Fourth IEEE International Symposium on Network Computing and Applications

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“…Understanding the performance results is also made easier because probes can be inserted in any part of the system. This idea is not really new since it is used, for instance, in the ETA prototype [15]. The TOAD approach is unique in that this project builds an experimental setting that is as close as possible to the real hardware situation, and in understanding and quantifying where reality and theory differ.…”

Section: A Principle Of the Emulationmentioning

confidence: 99%

Studying network protocol offload with emulation: approach and preliminary results

Westrelin

Fugier

Nordmark

et al.

Proceedings. 12th Annual IEEE Symposium on High Performance Interconnects

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Abstract-To fully take advantage of high-speed networks while freeing CPU cycles for application processing, the industry is proposing new techniques relying on an extended role of the network interface card such as TCP Offload Engine and Remote Direct Memory Access. This paper presents an experimental study aimed at collecting the performance data needed to assess these techniques. This work is based on the emulation of an advanced network interface card plugged on the I/O bus. In the experimental setting, a processor of a partitioned SMP machine is dedicated to network processing. Achieving a faithful emulation of a network interface card is one of the main concerns and it is guiding the design of the Offload Engine software. This setting has the advantage of being flexible so that many different offload scenarios can be evaluated. Preliminary throughput results of an emulated TCP Offload Engine demonstrate a large benefit. The emulated TCP Offload Engine indeed yields 600 to 900% improvement while still relying on memory copies at the kernel boundary.

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ETA: experience with an intel xeon processor as a packet processing engine

Cited by 41 publications

References 4 publications

ProOnE: a general-purpose protocol onload engine for multi- and many-core architectures

ProOnE: a general-purpose protocol onload engine for multi- and many-core architectures

C-CORE: Using Communication Cores for High Performance Network Services

Studying network protocol offload with emulation: approach and preliminary results

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