Etching mechanisms of low-<i>k</i> SiOCH and selectivity to SiCH and SiO2 in fluorocarbon based plasmas

Possémé, N.; Chevolleau, T.; Joubert, O.; Vallier, L.; Mangiagalli, P.

doi:10.1116/1.1627337

Cited by 65 publications

(45 citation statements)

References 16 publications

(10 reference statements)

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Fluorocarbon-based plasmas are more frequently used for porous low-k etching than carbon-free plasma due to the polymerizing effect of fluorine-deficient species (CF 2 , CF and C 2 ). 37 Although considered as a potential sealing layer against damaging radicals, this fluorocarbon passivation layer may still act as a source of F radicals, which then penetrate into the porous structure and react with Si-CH 3 , leading to hydrogen abstraction. On horizontal surfaces, the bombardment by energetic positive ions helps partly removing this surface polymerizing layer, and hence a high etch rate could be obtained.…”

Section: Resultsmentioning

confidence: 99%

Improved Plasma Resistance for Porous Low-k Dielectrics by Pore Stuffing Approach

Zhang

Marneffe

Heyne

et al. 2014

ECS J. Solid State Sci. Technol.

View full text Add to dashboard Cite

The pore stuffing method is studied with the objective of improving the plasma induced damage for porous organo-silicate glass low-k dielectrics. Experiments on blanket films show that, pore stuffing reduces the low-k degradation compared to non-protected porous films during plasma etch. The post etch surface roughness is also improved. The protection mechanism is attributed to reduced radical penetration, mainly fluorine and oxygen. The resistance against vacuum UV degradation is also improved by pore stuffing, since polymers used as filling agents have a higher VUV absorption coefficient than Si-O based dielectric network. The protection effect against fluorocarbon-based gas discharges is extensively studied with both blanket and patterned samples. For patterning of porous, non-stuffed low-k films, the addition of polymerizing gas reduces surface plasma damage but this polymerizing protection effect doesn't work well on trench sidewalls. Pore stuffing enables an efficient sidewall protection even with oxidizing gas discharges.

show abstract

Section: Resultsmentioning

confidence: 99%

Improved Plasma Resistance for Porous Low-k Dielectrics by Pore Stuffing Approach

Zhang

Marneffe

Heyne

et al. 2014

ECS J. Solid State Sci. Technol.

View full text Add to dashboard Cite

show abstract

“…[6][7][8] . After partial etching, surface and structural modifications of the remaining films are investigated by XPS and infrared spectroscopy (FTIR).…”

Section: Methodsmentioning

confidence: 99%

Etching of porous SiOCH materials in fluorocarbon-based plasmas

Possémé

Chevolleau

Joubert

et al. 2004

Journal of Vacuum Science &Amp; Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena

Self Cite

View full text Add to dashboard Cite

This work focuses on the etching of different porous methylsilsesquioxane materials (spin on SiOCH, k=2.2) with different porosity (30%, 40% and 50%) in fluorocarbon-based plasmas (CF4∕Ar). The etching of these materials is performed on blanket wafers in a magnetically enhanced reactive ion etcher. The surface and bulk modification after partial etching are studied using different surface analysis techniques such as quasi-in-situ x-ray photoelectron spectroscopy (XPS), infrared spectroscopy (FTIR), and attenuated total reflection spectroscopy (FTIR-ATR). Similar to nonporous SiOCH materials, a decrease in etch rate of porous SiOCH films is observed with either increasing Ar dilution or polymerizing gas addition (CH2F2), which can lead in this last case to an etch stop phenomenon. The etch rate increases with higher porosity in the SiOCH film, since less material per unit thickness needs to be removed as the porosity increases. The XPS results show that a fluorocarbon layer is formed at the surface of the porous material and complementary angle resolved XPS analyses reveal that fluorocarbon species diffuse through the pores into the material. After partial etching, FTIR and ATR analyses reveal a carbon depletion in the remaining film, which indicates that the porous material is altered during plasma exposure. The film degradation is more important as the porosity increases. The etch rate evolution and film degradation are discussed and interpreted in terms of etching mechanisms and plasma surface interaction.

show abstract

“…The primary drawbacks to this approach are the difficulty of achieving perfect selectivity in the presence of inevitable surface defects, compatibility of the selective metal caps with next metal layer patterning and cleaning steps, and the added cost associated with the additional processing step. Etch selectivity.-While significant effort has been focused on understanding the influence of plasma etch chemistry, [349][350][351][352][353][354][355][356] low-k ILD porosity, 394 and ILD composition 395 on the low-k ILD plasma etch mechanisms and profiles, most ILD/ES etch selectivity studies have focused on a singular a-SiN:H or a-SiC:H ES material. Relatively little work has been reported investigating in detail how the properties and composition of the low-k ES can influence etch selectivity.…”

Section: Current Status Of Low-k Db/ccl/es Materials and R And Dmentioning

confidence: 99%

Dielectric Barrier, Etch Stop, and Metal Capping Materials for State of the Art and beyond Metal Interconnects

King

2014

ECS J. Solid State Sci. Technol.

133

115

View full text Add to dashboard Cite

Over the past decade, the primary focus for improving the performance of nano-electronic metal interconnect structures has been to reduce the impact of resistance-capacitance (RC) delays via utilizing insulating dielectrics with ever lower values of dielectric permittivity. The integration and implementation of such low dielectric constant (i.e. low-k) materials has been fraught with numerous challenges. For intermetal and interlayer (ILD) low-k dielectrics, these challenges have been largely associated to integration with metal interconnect fabrication processes and well documented and reviewed in the literature. Although equally important, less attention has been given to other low-k dielectrics utilized in metal interconnect structures that are commonly referred to as low-k dielectric barriers (DB), etch stops (ES), and/or Cu capping layers (CCL). These materials present numerous challenges as well for integration into metal interconnect fabrication processes. However, they also have more stringent integrated functionality requirements relative to low-k ILD materials that serve only a basic purpose of electrically isolating adjacent metal lines. In this article, we review the integration challenges and associated integrated functionality requirements for low-k DB/ES/CCL materials with a focus on the current status and future direction needed for these materials to facilitate both Moore's law (i.e. More Moore) and More than Moore scaling.

show abstract

Etching mechanisms of low-k SiOCH and selectivity to SiCH and SiO2 in fluorocarbon based plasmas

Cited by 65 publications

References 16 publications

Improved Plasma Resistance for Porous Low-k Dielectrics by Pore Stuffing Approach

Improved Plasma Resistance for Porous Low-k Dielectrics by Pore Stuffing Approach

Etching of porous SiOCH materials in fluorocarbon-based plasmas

Dielectric Barrier, Etch Stop, and Metal Capping Materials for State of the Art and beyond Metal Interconnects

Contact Info

Product

Resources

About