Evaluating and Improving Fault Localization

Pearson, Spencer S.; Campos, João C.; Just, René; Fraser, Gordon; Abreu, Rui; Ernst, M.; Pang, Deric; Keller, Benjamin J.

doi:10.1109/icse.2017.62

Cited by 360 publications

(345 citation statements)

References 43 publications

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“…Overall, at most 11 bugs can be found with any of the investigated SBFL techniques after examining the 1000 top ranking suspicious lines, requiring on average an inspection of about 250 files to discover any bug. These results extend earlier studies [8], [19] and show a generally poor performance of current SBFL approaches on this case study. We summarize the main lessons learned as: Lesson 1.…”

Section: Conclusion and Lessons Learnedsupporting

confidence: 89%

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A Critical Evaluation of Spectrum-Based Fault Localization Techniques on a Large-Scale Software System

Keller

Grunske

Heiden

et al. 2017

2017 IEEE International Conference on Software Quality, Reliability and Security (QRS)

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Abstract-In the past, spectrum-based fault localization (SBFL) techniques have been developed to pinpoint a fault location in a program given a set of failing and successful test executions. Most of the algorithms use similarity coefficients and have only been evaluated on established but small benchmark programs from the Software-artifact Infrastructure Repository. In this paper, we evaluate the feasibility of applying 33 state-ofthe-art SBFL techniques to a large real-world project, namely ASPECTJ. From an initial set of 350 faulty version from the iBugs repository of ASPECTJ we manually classified 88 bugs where SBFL techniques are suitable. Notably, only 11 bugs of these bugs can be found after examining the 1000 most suspicious lines and on average 250 source code files need to be inspected per bug. Based on these results, the study showcases the limitations of SBFL on a larger program and points out areas for improvement.

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Section: Conclusion and Lessons Learnedsupporting

confidence: 89%

“…Most approaches in this area [2], [4], [8]- [17] have been evaluated based on analytic effectiveness metrics computed on a set of small benchmarks from the Software-artifact Infrastructure Repository (SIR) [18]. Just recently, an evaluation [19] with medium-sized programs via the Defects4J benchmark [20] has been made available.…”

Section: Introductionmentioning

confidence: 99%

A Critical Evaluation of Spectrum-Based Fault Localization Techniques on a Large-Scale Software System

Keller

Grunske

Heiden

et al. 2017

2017 IEEE International Conference on Software Quality, Reliability and Security (QRS)

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“…The state-of-the-art FL techniques like Spectrum-based Fault Localization (SBFL) [1], [2] traditionally rank statements by their likelihood of containing a fault. This leads to localization weaknesses for complex faults that span multiple lines [3] (76% of faults) or that are caused by the omission of statements (30% of faults) [4], [5].…”

Section: Introductionmentioning

confidence: 99%

Towards Fault Localization via Probabilistic Software Modeling

Thaller

Linsbauer

Egyed

et al. 2020

2020 IEEE Workshop on Validation, Analysis and Evolution of Software Tests (VST)

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Software testing helps developers to identify bugs. However, awareness of bugs is only the first step. Finding and correcting the faulty program components is equally hard and essential for high-quality software. Fault localization automatically pinpoints the location of an existing bug in a program. It is a hard problem, and existing methods are not yet precise enough for widespread industrial adoption. We propose fault localization via Probabilistic Software Modeling (PSM). PSM analyzes the structure and behavior of a program and synthesizes a network of Probabilistic Models (PMs). Each PM models a method with its inputs and outputs and is capable of evaluating the likelihood of runtime data. We use this likelihood evaluation to find fault locations and their impact on dependent code elements. Results indicate that PSM is a robust framework for accurate fault localization.

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Section: B Combining the Scan Test Hardware System With Traditional mentioning

confidence: 99%

“…There is a key factor for an effective dynamic analysis while running an at-speed testing such as transitional delay. Figure 12 shows the failure analysis flow using hardware scan and diagnosis tools [21]. Laser-assisted device alteration (LADA) is a laser-based timing failure analysis technique (see Figure 13) used in the failure analysis of semiconductor devices [22].…”

Section: B Combining the Scan Test Hardware System With Traditional mentioning

confidence: 99%

Efficient Fault Localization and Failure Analysis Techniques for Improving IC Yield

Oberai

Yuan

2018

Electronics

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With the increase in the complexity of the semiconductor device processes and increase in the challenge to satisfy high market demands, enhancement in yield has become a crucial factor. Discovering and reacting to yield problems emerging at the end of the production line may cause unbearable yield loss leading to larger times to market. Thus, time and cost involved in fault isolation may be significantly shortened by effectively utilizing the fault diagnosis technology and supporting yield improvements. Hence for yield analysis, a highly integrated data network with software analysis tools have been established to reduce the fault analysis time. Synopsys Avalon, a product used for fault localization is described in this paper which aids in achieving better integrated circuit yields. This paper also illustrates various fault localization techniques for faster problem identification and discusses a few analytical tools like photon emission microscope and transmission emission microscope for faster determination of device failures.

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Evaluating and Improving Fault Localization

Cited by 360 publications

References 43 publications

A Critical Evaluation of Spectrum-Based Fault Localization Techniques on a Large-Scale Software System

A Critical Evaluation of Spectrum-Based Fault Localization Techniques on a Large-Scale Software System

Towards Fault Localization via Probabilistic Software Modeling

Efficient Fault Localization and Failure Analysis Techniques for Improving IC Yield

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