Evaluating application mapping scenarios on the Cell/B.E.

Abstract

SUMMARYApplications running on multicore platforms are difficult to program, and even more difficult to optimize, mainly due to (1) the several layers where the optimizations occur and (2) the multitude of available resources to be exploited in parallel. Although low-level optimizations only target code running on individual cores, high-level optimizations (e.g. data-and task-parallelism) target the overall application performance. In this paper, we focus on the latter, by evaluating possible mapping scenarios of a real application on a heterogeneous multicore processor. Specifically, we focus on analyzing the impact of combining data-and task-parallelism for a multimedia analysis application running on the Cell Broadband Engine (Cell/B.E.). We find that both low-level and high-level optimizations are important for the overall application speed-up. However, we show that a speed-up factor of over 20 for the application running on Cell/B.E. can only be obtained if core utilization is increased by combining data-and task-parallelism. Thus, we consider this case study essential for building expertise in both application optimization and performance analysis for multicore platforms.

Intensive computing on a large data volume with a short‐vector single instruction multiple data processor

“…In this case, by executing the algorithm on the QS20 which allows to activate 16 SPE cores, it is achieved a speed‐up of almost 10 and 7 related to the execution of the algorithm on a single SPE core and a Pentium 4 processor. Varbanescu et al [11] performed an evaluation of different strategies for optimisation of applications for Cell BE architecture. Varbanescu et al [11] concluded that the more effective optimisation strategy is obtained by combining data‐ and task‐parallelism, in this case being obtained a speed‐up around 20 for a multimedia analysis application.…”

“…Varbanescu et al [11] performed an evaluation of different strategies for optimisation of applications for Cell BE architecture. Varbanescu et al [11] concluded that the more effective optimisation strategy is obtained by combining data‐ and task‐parallelism, in this case being obtained a speed‐up around 20 for a multimedia analysis application. An implementation optimised for the Cell BE architecture of grey‐level co‐occurrence matrices and Haralick texture features is presented in [12].…”

Characterizing the basic synchronization and communication operations in Dual Cell-based Blades through CellStats

“…The main drawback of this method is the limited size of the LS (only 256 kbytes). However, in [20], the authors demonstrate that this approach is more efficient than creating as many threads as tasks in several orders of magnitude, and they implement an overlay-based technique to solve the LS limitation.…”

“…To optimize their applications, multicore programmers should design several data layouts of their applications, and choose the best mapping according to their target architectures [20]. In case of the Cell BE, this situation becomes much harder than conventional multicores due to the explicit control of DMA transfers and its heterogeneity.…”