Evaluating the Impact of BTI on Hiding Countermeasures for DPA and DEMA Attacks

Abstract

Bias Temperature Instability (BTI) is a central issue in integrated circuits' reliability, as it degrades transistors' performance. In deeply scaled technologies, an increasing variability accompanies this effect. Secure topologies for cryptographic circuits aiming to increase resilience to Side-Channel Attacks through a homogeneous power consumption may be particularly subject to the impact of an unbalance caused by an aging effect. A statistical evaluation based on Monte Carlo simulations with a time-dependent BTI model based on trap kinetics was performed in this work. The results indicate that, despite the significant variability and degradation caused by the BTI in the secure cells' performance, the homogeneity of the power consumption was not considerably affected.