2019 International Conference on High Performance Computing &Amp; Simulation (HPCS) 2019
DOI: 10.1109/hpcs48598.2019.9188179
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Evaluating the Memory Architecture of Next-Generation FPGA-SoCs for HPC

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Cited by 3 publications
(1 citation statement)
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“…Secondly, [5] evaluates the memory architecture of a nextgeneration FPGA-SoC to validate the claims of increased memory bandwidth and cache coherency support [5]. This study distinguishes itself by emphasizing memory bandwidth and cache coherency support.…”
Section: Related Workmentioning
confidence: 99%
“…Secondly, [5] evaluates the memory architecture of a nextgeneration FPGA-SoC to validate the claims of increased memory bandwidth and cache coherency support [5]. This study distinguishes itself by emphasizing memory bandwidth and cache coherency support.…”
Section: Related Workmentioning
confidence: 99%