Evaluation of Correlation Power Analysis Resistance and Its Application on Asymmetric Mask Protected Data Encryption Standard Hardware

Shan, Weiwei; Chen, Xin; Li, Bo; Cao, Peng; Li, Jie; Gu-gang, Gao; Shi, Longxing

doi:10.1109/tim.2013.2259754

Cited by 12 publications

(8 citation statements)

References 18 publications

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“…Different from the above two methods, we adopt the most convenient way compatible to the current digital IC EDA design flow, that is, utilizing a special mode of power analysis tool of PrimeTime Power Extension (PTPX) to gain active power traces [8]. This mode is time-based PTPX mode, which is able to reveal the dynamic power traces according to the specific simulation activity during the encryption operation.…”

Section: Eda Evaluation Methods At Design-timementioning

confidence: 99%

See 1 more Smart Citation

A side-channel analysis resistant reconfigurable cryptographic coprocessor supporting multiple block cipher algorithms

Shan¹,

Shi²,

Fu³

et al. 2014

2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)

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A side-channel analysis resistant reconfigurable cryptographic coprocessor is designed and fabricated in 0.18μm CMOS with 1.8V supply and 100MHz frequency, supporting multiple block cipher algorithms of AES, DES, RC6 and IDEA. Our countermeasure utilizes idle processing elements existed in reconfigurable array to do dummy operations to hide leakage information. This method has little impact on area and frequency, and it is flexible after silicon. It resists SPA and DPA without distinguishing the encryption region. And by correlation-based electromagnetic analysis, measurement to disclosure of DES enhances 36 times with partial countermeasures and AES discloses no subkey after more than one million electromagnetic traces with full countermeasures.

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Section: Eda Evaluation Methods At Design-timementioning

confidence: 99%

“…In these systems, cryptographic chips [1][2][3][4][5][6][7][8] are the foundation of their security. However, the emergence of side channel attacks (SCAs) has become a serious threat to cryptographic chips.…”

Section: Introductionmentioning

confidence: 99%

A side-channel analysis resistant reconfigurable cryptographic coprocessor supporting multiple block cipher algorithms

Shan¹,

Shi²,

Fu³

et al. 2014

2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)

Self Cite

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“…DPA first proposed by Kocher [20] has been extensively studied in the literature. DPA and its variant CPA [34, 35] is one of the types of PAA that exploit the data‐dependent property of the power consumption of the circuit. DPA uses the difference of means method to predict the key while CPA uses a statistical distinguisher namely Pearson's correlation coefficient (CC) to correlate between the measurements obtained and predictions made.…”

Section: Power Analysis Attacks (Paas)mentioning

confidence: 99%

Survey on power analysis attacks and its impact on intelligent sensor networks

Shanmugham

Paramasivam

2018

IET wirel. sens. syst.

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Smart or intelligent sensors are integrated physical units embedded with sensors, processors, and communication devices. The sensors also known as edge nodes form the lower-most tier in the internet of things architecture. These devices rely on cryptographic technique to ensure 'root of trust' for the users. The implementation attacks namely side-channel attacks (SCAs) pose a dangerous threat for the cryptographic implementation in the edge nodes since the attacks are undetectable by nature. Among the different categories of SCAs proposed in the literature, power analysis attacks (PAAs) are vastly studied and widely employed because it can be mounted with relatively inexpensive equipment. In this study, the different categories of PAAs along with the countermeasures are reviewed in detail. The impact of the SCA on the edge nodes is examined along with a case study on medical sensor nodes.

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“…Since the side-channel attack is proposed by Kocher in 1996 [3], numerous attack approaches, including simple power analysis (SPA) [4], differential power analysis (DPA) [5], correlation power analysis (CPA) [6], template attack (TA) [7], etc, have been explored to reveal the sensitive information of the cryptographic implementations. Of all SCAs, DPA and CPA have become the main threat to the confidentiality of cryptographic implementations for its simplicity and effectiveness.…”

Section: Introductionmentioning

confidence: 99%

A novel SCA-resilience flip-flop design utilizing the current mode logic based on the three-independent-gate field effect transistors

Liu

Xia

et al. 2021

IEICE Electron. Express

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In this paper, current mode logic based on the three-independentgate field effect transistor (TIGFET) is introduced as the circuit-level side-channel attack (SCA) countermeasures, and a SCA-resilience flip-flop (DyCML) is designed to make the power consumption constant. Then, a simplified advanced encryption system (AES) is built, and power analysis is performed to evaluate the SCA-resistance efficacy. Simulation results show that the key with the TIGFET-based DyCML is not revealed with 255 power traces. The proposed design occupies less area usage and requires less delay overhead compared to the original TIGFET-based true single-phase clock (TSPC) and modified TSPC (mTSPC).

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Evaluation of Correlation Power Analysis Resistance and Its Application on Asymmetric Mask Protected Data Encryption Standard Hardware

Cited by 12 publications

References 18 publications

A side-channel analysis resistant reconfigurable cryptographic coprocessor supporting multiple block cipher algorithms

A side-channel analysis resistant reconfigurable cryptographic coprocessor supporting multiple block cipher algorithms

Survey on power analysis attacks and its impact on intelligent sensor networks

A novel SCA-resilience flip-flop design utilizing the current mode logic based on the three-independent-gate field effect transistors

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