2021
DOI: 10.3390/electronics10151759
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Evaluation of Low-Frequency Noise in MOSFETs Used as a Key Component in Semiconductor Memory Devices

Abstract: Methods for evaluating low-frequency noise, such as 1/f noise and random telegraph noise, and evaluation results are described. Variability and fluctuation are critical in miniaturized semiconductor devices because signal voltage must be reduced in such devices. Especially, the signal voltage in multi-bit memories must be small. One of the most serious issues in metal-oxide-semiconductor field-effect-transistors (MOSFETs) is low-frequency noise, which occurs when the signal current flows at the interface of di… Show more

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Cited by 8 publications
(5 citation statements)
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“…Figure 2 shows different types of traps namely, Surface/Interface‐trap, and Border‐trap. The traps that occur at the oxide and MoS 2 interface layer are called Interface‐traps and traps at the edges of an insulation layer are called border traps and these traps are accountable for LFN in the device 14,22 …”
Section: Hetero‐dielectric Mos2fet Transistor Device Structurementioning
confidence: 99%
See 1 more Smart Citation
“…Figure 2 shows different types of traps namely, Surface/Interface‐trap, and Border‐trap. The traps that occur at the oxide and MoS 2 interface layer are called Interface‐traps and traps at the edges of an insulation layer are called border traps and these traps are accountable for LFN in the device 14,22 …”
Section: Hetero‐dielectric Mos2fet Transistor Device Structurementioning
confidence: 99%
“…The traps that occur at the oxide and MoS 2 interface layer are called Interface-traps and traps at the edges of an insulation layer are called border traps and these traps are accountable for LFN in the device. 14,22 Table 1 shows a few parameter values used in Figure 1 for the designing of the MoS 2 FET hetero-dielectric device. 23,34 In our model, we assumed that electrons while scattering inside the insulator, its attenuation coefficient decreases exponentially with respect to distance for the oxide-semiconductor interface region.…”
Section: Hetero-dielectric Mos Fet Transistor Device Structurementioning
confidence: 99%
“…The third review paper in the Special Issue is by Teramoto [3] and discusses lowfrequency noise in metal-oxide-semiconductor field-effect transistors (MOSFETs), representing the building blocks of the memory cells of the most important solid-state storage technologies. Due to the relevant role played by the phenomenon on the reliability of deeply scaled devices, emphasis is on random telegraph noise (RTN) and on its statistical experimental characterization and theoretical analysis.…”
Section: Overview Of the Papers In The Special Issuementioning
confidence: 99%
“…The implemented noise modelling is limited to 1/f noise, but this is not a major issue. The presented buffer can be considered a low-frequency circuit, and the 1/f noise is pronounced and important in that frequency range [34].…”
Section: Noise Simulationsmentioning
confidence: 99%