Evaluation of sheet resistance and electrical linewidth measurement techniques for copper damascene interconnect

Smith, S.; Walton, A.J.; Ross, A.W.S.; Bodammer, G.; Stevenson, J.T.M.

doi:10.1109/66.999595

Cited by 16 publications

(6 citation statements)

References 9 publications

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“…( 1) calculation as the Cu widths (W Cu ) are not larger greater than the width of barrier (W bv ). 17,18) In other words, the resistance of TaN/Ta plays an important role to affect evolution of total resistance. Hence, in this study, the resistance of metal is close to the value of R eq as line widths are larger (W Cu > 20W bv ), as shown in Fig.…”

Section: Resultsmentioning

confidence: 99%

Measurement Techniques of Sheet Resistance on Copper Defects after Chemical Mechanical Polishing

Hung

Lee

Wang

et al. 2008

jjap

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To date, various connection rerouting methods for connection-oriented mobile networks have been proposed. The previous methods, however, are limited to specific topologies or environments. In this paper, we propose the connection-information-based rerouting widely applicable to various connection-oriented mobile networks. This method requires neither a specific topology nor a complex connection, enables fast rerouting, provides appropriate route optimality, and can be extended easily.

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Section: Resultsmentioning

confidence: 99%

Measurement Techniques of Sheet Resistance on Copper Defects after Chemical Mechanical Polishing

Hung

Lee

Wang

et al. 2008

jjap

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“…Another issue to be taken into account when applying the proposed technique is the impact of dishing and erosion caused by chemical mechanical polishing (CMP) in damascene Cu lines [24], [25], [30], since sheet resistance is a function of line width and pattern density. Efficient modeling is available for mature processes [26]- [28], and the metal thickness can be controlled provided the comb-meander structure has uniform density.…”

Section: Scalability Of the Methodsmentioning

confidence: 99%

Localization and Electrical Characterization of Interconnect Open Defects

Rodriguez-Montaes

Arumí

Figueras

et al. 2010

IEEE Trans. Semicond. Manufact.

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“…For each line, there are two pads at each end that are used as probe contacts during E-test (Fig. 3), [13]. Four-point measurement, which applies current through the two outer pads and measures voltage difference between the two inner pads, is employed to measure the resistances of the lines.…”

Section: A Test Chip Designmentioning

confidence: 99%

Modeling the Electrical Effects of Metal Dishing Due to CMP for On-Chip Interconnect Optimization

Cao

Spanos

2004

IEEE Trans. Electron Devices

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Abstract-A dishing model is developed to investigate the electrical effects of metal dishing in the damascene process, based on experimental data and physical analysis. A metric for dishing, the Dishing Radius, has been defined. A study utilizing this model shows that the impact of dishing on performance can be mitigated at both the process and design stages. More specifically, process improvement is most effective when the dishing radius is less than 50 m. During design, dishing effects can be suppressed by uniformly splitting a wide line into several narrower lines; the most beneficial number of line-splitting is between two and four from both efficiency and performance considerations.

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Evaluation of sheet resistance and electrical linewidth measurement techniques for copper damascene interconnect

Cited by 16 publications

References 9 publications

Measurement Techniques of Sheet Resistance on Copper Defects after Chemical Mechanical Polishing

Measurement Techniques of Sheet Resistance on Copper Defects after Chemical Mechanical Polishing

Localization and Electrical Characterization of Interconnect Open Defects

Modeling the Electrical Effects of Metal Dishing Due to CMP for On-Chip Interconnect Optimization

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