Evaluation of stress stabilities in amorphous In–Ga–Zn–O thin-film transistors: Effect of passivation with Si-based resin

Abstract

Fabrication process conditions of a passivation (PV) layer correlated with stress stabilities of amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs). In etch-stop layer (ESL)-TFTs, by inserting a Si-based resin between SiN x and SiO x PV layers, the peak intensity in the photoinduced transient spectroscopy (PITS) spectrum was notably reduced. This suggested the suppression of hydrogen incorporation into a-IGZO, which led to the improvement of stability under negative bias thermal illumination stress (NBTIS). In contrast, the hydrogen-related defects in the a-IGZO were easily formed by the back-channel etch (BCE) process. Furthermore, it was found that, under NBTIS, the transfer curves of the BCE-TFTs shifted in parallel owing to the positive fixed charge located in the back channel of the a-IGZO TFTs. The hump-shaped shift increased with stress time. This is because hydrogen atoms located at the back-channel surfaces of the a-IGZO and/or PV layers were incorporated into the channel region of the BCE-TFTs and induced the hydrogen-related defects.

Electrical Characterization of Zinc‐Rich Amorphous In‐Ga‐Zn‐O Thin Film Transistors

“…The trap states related with the oxygen deficient states were deep as already discussed, and hence, they have little impact to the V th shift for a‐IGZO with relatively high electron mobility since almost of all traps are neutral. In addition, it is known that the formation of positive charge on the a‐IGZO backchannel surface induced the negative‐parallel shift of V th . For that reason, it is considered that a shallower trap level, in which the PITS signal may appear in the low temperature region, is a contributing factor.…”

(Invited) Hydrogen-Related Trap States Induced during Fabrication Process and Annealing Effects in Amorphous in-Ga-Zn-O Thin Film Transistors

“…In order to compare effects of the hydrogen treatment to the back channel region of the a-IGZO, ESL-TFTs with the same PVL-SiO x layer were also prepared. Finally, for verifying temperature dependence of the post-process annealing, a-IGZO BCE-TFTs with PVL composed of a triple layered SiN x /Siresin/SiO x 14 were prepared. Each sample conditions were listed in Table 1.…”

“…In this work, the influences of S/D wet-etching process onto electronic properties of the back channel region of a-IGZO were examined while the compositional changes and the electronic states were revealed by x-ray photoelectron spectroscopy (XPS) and photoinduced transient spectroscopy (PITS) analyses, respectively. 13,14 Then, effects of additional hydrogen plasma treatment on the stress stability of the a-IGZO BCE-TFTs were examined and correlated with the compositional changes of Zn at the back channel region. Finally, post-process annealing effects to the a-IGZO BCE-TFTs were discussed.…”

Investigation on the gate insulator thickness dependence of ZnO–SnO2 thin film transistors

“…In particular, among TAOSs, amorphous InGaZnO (IGZO) based TFTs have been widely investigated because of their excellent properties. [4][5][6][7] However, IGZO materials have some drawbacks such as element scarcity and toxicity of indium. Therefore, there is a need for new TAOSs that are nontoxic and inexpensive.…”