Evidence of the Robustness of a COTS Soft-Error Free SRAM to Neutron Radiation

Abstract

Abstract-Radiation tests with 15-MeV neutrons were performed in a COTS SRAM including a new memory cell design combining SRAM cells and DRAM capacitors to determine if, as claimed, it is soft-error free and to estimate upper bounds for the cross-section. These tests led to cross-section values two orders of magnitude below those of typical CMOS SRAMs in the same technology node. MUSCA SEP3 simulations complement these results predicting that only high-energy neutrons (> 30 MeV) can provoke bit flips in the studied SRAMs. MUSCA SEP3 is also used to investigate the sensitivity of the studied SRAM to radioactive contamination and to compare it with the one of standard CMOS SRAMs. Results are useful to make predictions about the operation of this memory in environments such as avionics.

Neutron-Induced Single Events in a COTS Soft-Error Free SRAM at Low Bias Voltage

“…In a previous work, it was concluded that the SEU cross section in A-LPSRAM memories was two orders of magnitude below those of its counterparts in bulk CMOS technology [5]. However, as other authors have reported SEUs with protons and heavy ions [3], [4], it was likely that SEUs appeared at low values of bias voltage since there is evidence that, at least in bulk CMOS memories, the cross section exponentially grows as the bias voltage approaches the minimum value [10].…”

“…Since 2013, this accelerator has been used to irradiate integrated circuits from different technologies [5], [9]. It is an electrostatic accelerator producing neutrons by impinging a deuteron beam Neutron production is monitored throughout the experiments to determine the neutron dose for each irradiation.…”

“…Above 1 V, no SEUs were observed. Using the procedure explained in [5] and references therein, the conclusion is that the SEU cross section is below 7.2 · 10 −17 cm 2 /bit for this kind of radiation at V CC = 1 V with 95%-confidence. This figure beats in more than one order of magnitude the first estimation, 2.0 · 10 −15 cm 2 /bit at V CC = 3.3 V , presented in a previous work [5].…”

“…Recently, the behavior of these memories under very energetic protons has been explored in order to propose its use in the CERN LHC upgrade [4]. Also, the memories were tested under 15-MeV neutrons at the GENEPI2 facility at nominal bias voltage [5].…”

Statistical Anomalies of Bitflips in SRAMs to Discriminate SBUs From MCUs

“…If . Error bars were calculated with the inverse χ 2 function, as explained in [13]. An equivalent graph, but related to the CDAV, can be found in [14].…”