Evolution of surface morphology during the growth of amorphous and polycrystalline silicon films

Novak, A. V.; Novak, V. R.; Смирнов, Д. И.

doi:10.1134/s1027451017050317

Cited by 3 publications

(1 citation statement)

References 15 publications

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“…So to full fill both two requirements, the Oxide/Phosphorus-doped polysilicon/Oxide stack is used as the common source at the bottom of array in the 3D NAND flash memory. To achieve better electrical performance and lower interface roughness, LPCVD high-concentration in-situ phosphorus-doped amorphous silicon (a-Si) is preferred [1]. However, when the doping concentration of phosphorus increases, it will exceed the solubility limit in silicon [2], causing most of the phosphorus to be in an unstable state and easily precipitates on the surface [3].…”

Section: Introductionmentioning

confidence: 99%

Optimization of Bump Defect at High-Concentration In-Situ Phosphorus Doped Polysilicon/TEOS Oxide Interface for 3D NAND Flash Memory Application

Zhao

Xia

Wu³

et al. 2021

IEEE J. Electron Devices Soc.

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In the 3D NAND Flash memory manufacturing process, high-concentration in-situ phosphorus-doped polysilicon and TEOS oxide stack will produce bump defects at the interfaces, causing pattern defects and electrical failures. The formation mechanism of bump defects caused by oxygen-containing groups and phosphorus at the lower and upper interfaces of phosphorus-doped polysilicon is investigated in detail. Two methods were demonstrated to reduce bump defects, wet processing and Rapid Thermal Oxidation (RTO). The wet processing is to remove oxygen-containing groups and phosphorus, while the RTO process increases the solubility of phosphorus in silicon. Both methods have significantly reduced bump defects and greatly increased the yield rate, and further verify the proposed formation mechanism of bump defects.Index Terms-bump defects, phosphorus-doped polysilicon, TEOS, wet processing, RTO.

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Section: Introductionmentioning

confidence: 99%