Nowadays, Motion Estimation (ME) plays a vital role in traffic signals, movie making, and security purpose to identify the motion of an object. In this paper, Smart and Low power (SLP) based ME is introduced with Level Convertor and Carry SeLect Adder (LC-CSLA-ME). Normal SLP architecture requires more power for performing ME, but in the LC-CSLA-ME architecture, 0.9v supply voltage is used to carry-out the ME. The LC is used to supply the required voltage to the respective sub blocks, which helps to reduce the power consumption of the overall architecture. Instead of using normal adder, CSLA adder is used in prediction and classification unit for improving the hardware utilization. The performance of Application Specified Integrated Chips (ASIC) and Field Programmable Gate Array (FPGA) analysed for both existing and proposed methods. In 180nm technology, LC-CSLA-ME architecture occupied 0.065mm 2 area, 2.10mW power, and 104ms delay. The different dataset such as Johnny, Vidyo 1, and Vidyo 4 is analysed for ME. The Coding Time Saving (CTS) evaluated for both existing and LC-CSLA-ME architectures. In the LC-CSLA-ME, average CTS of Operating Power Points (OPP1, OPP2, OPP3, OPP4, and OPP5) are 34.021, 54.316, 67.021, 75.027, and 80.071 that is high compared to the existing methods.