Exact grading of multiple path delay faults

Abstract

The problem of fault grading for multiple path delay faults is studied and a method of obtaining the exact coverage is presented. The faults covered are represented and manipulated as sets by zero-suppressed binary decision diagrams (ZBDD), which are shown to be able to store a very large number of path delay faults. For the extreme case of memory problem, a method to estimate the coverage of the test set is also presented. The problem of fault grading is solved with a polynomial number of BDD operations. Experimental results on the ISCAS'85 benchmark include test sets from ATPG tools and specifically designed tests in order to investigate the limitations and properties of the proposed method.

Enhanced Identification of Strong Robustly Testable Paths

“…The set of strong robustly testable paths from S SR that meet the timing constraint mentioned above are added to the off input validation set V of f only if the path has the same identical sub path as the target path starting from the output of the off input gate and ending at the primary output. The identification of the paths which coincide with the on input sub-path can be done efficiently using zero suppressed binary decision diagrams (ZBDDs) [4].…”