Exascale design space exploration and co-design

Dosanjh, Sudip S.; Barrett, Richard Frederick; Doerfler, Douglas; Hammond, Simon David; Hemmert, Karl Scott; Heroux, Michael A.; Lin, Paul; Pedretti, Kevin; Rodrigues, Arun F.; Trucano, Tim; Luitjens, Justin

doi:10.1016/j.future.2013.04.018

Cited by 39 publications

(22 citation statements)

References 19 publications

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“…However, next-generation node architectures are likely to require up to thousand-way on-node shared memory parallelism (Dosanjh et al, 2014;Engelmann, 2014;Rajovic et al, 2013;Attig et al, 2011), and thus it is crucial to ascertain the cause of the observed degradation and the implications for greater levels of scalability. Considering nodes with 32, 64, 128, or 1024 shared memory cores and beyond, it cannot be taken for granted that performance will continue to improve.…”

Section: Applicationmentioning

confidence: 99%

Memory bottlenecks and memory contention in multi-core Monte Carlo transport codes

Tramm

Siegel

2015

Annals of Nuclear Energy

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Section: Applicationmentioning

confidence: 99%

Memory bottlenecks and memory contention in multi-core Monte Carlo transport codes

Tramm

Siegel

2015

Annals of Nuclear Energy

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“…Note that there is a good correlation between the drop in solve efficiency for miniFE and the 2D app. A similar study was performed on a dual-socket AMD Magny-Cours 12-core processor workstation [7], with good correlation between the drop in solve efficiency for miniFE and the 2D app. Table IIIb presents the effect of multiple MPI tasks (one MPI task per core) on the matrix assembly efficiency.…”

Section: Effect Of Processor Memory Bandwidthmentioning

confidence: 73%

Assessing a mini‐application as a performance proxy for a finite element method engineering application

Lin

Heroux

Barrett

et al. 2015

Concurrency and Computation

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SUMMARYThe performance of a large-scale, production-quality science and engineering application ('app') is often dominated by a small subset of the code. Even within that subset, computational and data access patterns are often repeated, so that an even smaller portion can represent the performance-impacting features. If application developers, parallel computing experts, and computer architects can together identify this representative subset and then develop a small mini-application ('miniapp') that can capture these primary performance characteristics, then this miniapp can be used to both improve the performance of the app as well as provide a tool for co-design for the high-performance computing community. However, a critical question is whether a miniapp can effectively capture key performance behavior of an app. This study provides a comparison of an implicit finite element semiconductor device modeling app on unstructured meshes with an implicit finite element miniapp on unstructured meshes. The goal is to assess whether the miniapp is predictive of the performance of the app. Single compute node performance will be compared, as well as scaling up to 16,000 cores. Results indicate that the miniapp can be reasonably predictive of the performance characteristics of the app for a single iteration of the solver on a single compute node. Published 2015.

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“…The work of [14] and [15], analyzed the impact of communications when scaling to a larger number of processors, and the expected degradation in the network bandwidth, respectively. These works have been focused on the communication interface and in the hardware rather than in the basic behavior of the applications using them.…”

Section: Related Workmentioning

confidence: 99%

Scalability prediction for fundamental performance factors

Rosas

Giménez

Labarta

2014

JSFI

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Inferring the expected performance for parallel applications is getting harder than ever; applications need to be modeled for restricted or nonexistent systems and performance analysts are required to identify and extrapolate their behavior using only the available resources. Prediction models can be based on detailed knowledge of the application algorithms or on blindly trying to extrapolate measurements from existing architectures and codes. This paper describes the work done to define an intermediate methodology where the combination of (a) the essential knowledge about fundamental factors in parallel codes, and (b) detailed analysis of the application behavior at low core counts on current platforms, guides the modeling efforts to estimate behavior at very large core counts. Our methodology integrates the use of several components like instrumentation package, visualization tools, simulators, analytical models and very high level information from the application running on systems in production to build a performance model.

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Exascale design space exploration and co-design

Cited by 39 publications

References 19 publications

Memory bottlenecks and memory contention in multi-core Monte Carlo transport codes

Memory bottlenecks and memory contention in multi-core Monte Carlo transport codes

Assessing a mini‐application as a performance proxy for a finite element method engineering application

Scalability prediction for fundamental performance factors

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