Excellent Rectifying Properties of the n-3C-SiC/p-Si Heterojunction Subjected to High Temperature Annealing for Electronics, MEMS, and LED Applications

Abstract

This work examines the stability of epitaxial 3C-SiC/Si heterojunctions subjected to heat treatments between 1000 °C and 1300 °C. Because of the potential for silicon carbide in high temperature and harsh environment applications, and the economic advantages of growing the 3C-SiC polytype on large diameter silicon wafers, its stability after high temperature processing is an important consideration. Yet recently, this has been thrown into question by claims that the heterojunction suffers catastrophic degradation at temperatures above 1000 °C. Here we present results showing that the heterojunction maintains excellent diode characteristics following heat treatment up to 1100 °C and while some changes were observed between 1100 °C and 1300 °C, diodes maintained their rectifying characteristics, enabling compatibility with a large range of device fabrication. The parameters of as-grown diodes were J0 = 1 × 10−11 A/mm2, n = 1.02, and +/−2V rectification ratio of 9 × 106. Capacitance and thermal current-voltage analysis was used to characterize the excess current leakage mechanism. The change in diode characteristics depends on diode area, with larger areas (1 mm2) having reduced rectification ratio while smaller areas (0.04 mm2) maintained excellent characteristics of J0 = 2 × 10−10 A/mm2, n = 1.28, and +/−2V ratio of 3 × 106. This points to localized defect regions degrading after heat treatment rather than a fundamental issue of the heterojunction.

Photoresponse of a Highly-Rectifying 3C-SiC/Si Heterostructure Under UV and Visible Illuminations

“…The crystal defects, mainly stacking faults, as well as film quality can be improved by carbonizing the active silicon surface before the deposition of 3C-SiC [10], [11]. A number of studies have reported that, despite the presence of crystal defects at the interface, 3C-SiC/Si heterojunction show excellent diode characteristics with a large valance band offset (1.7 eV) between SiC and Si [12]- [14]. As such, the large effective barrier height could be very useful for many applications, such as piezoresistive sensors [6], piezo-Hall devices [15], and biomedical applications [16], where electrical isolation between 3C-SiC and Si is essential.…”

Electrical leakage phenomenon in heteroepitaxial cubic silicon carbide on silicon

“…The carbon interstitials can behave as deep acceptors in silicon with an activation energy of 0.35 eV from the valence band (hole traps) 23 , and assist compensation of unintentional donors in the SiC film as well as hole injection from the Si substrate across the Si/SiC interface further reducing the effectiveness of p-n junction. 4 Hence, the generation of a considerable amount of interstitial carbon defects in the top portion of silicon upon high temperature epitaxy, would explain both the mechanical and the electrical behaviour observed in the SiC/Si system.…”

“…2 Despite these significant properties, no 3C-SiC based devices are currently commercially available 3 and this is due in part to problems associated with SiC/Si junctions. [4][5][6] We have recently shown that the expected p-n junction between a p-type silicon substrate to the 3C-SiC, naturally grown as unintentionally n-type, is either non-existing or very unstable so that severe leakage or even plain shorting of the epitaxial silicon carbide to the underlying silicon substrate 1 is typically found. 7,8 The absence of a stable p-n junction at the SiC/Si interface could pose important limitations to the applications of 3C-SiC in power electronics, harsh environment, MEMS, LEDs, graphene-based devices, etc.…”

On the Suitability of 3C-Silicon Carbide as an Alternative to 4H-Silicon Carbide for Power Diodes

“…Furthermore, a high density of defects characterizes the region where the 3C-SiC/Si interface is, due to inherent lattice (20%) mismatch and differences in the thermal expansion coefficients [7], [50] between the two materials. For a representative device model of vertical diodes, the inclusion of these 3C-SiC deep levels is required.…”