Execution Dependence Extension (EDE): ISA Support for Eliminating Fences

Shull, Thomas; Vougioukas, Ilias; Nikoleris, Nikos; Elsasser, Wendy; Torrellas, Josep

doi:10.1109/isca52012.2021.00043

Cited by 4 publications

(2 citation statements)

References 41 publications

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“…There are also software‐based systems with hardware aid. Shull et al 38 proposed an ISA extension to the AArch64 architecture enabling dependencies between store and logging instructions enforcing no fence. This approach reduces fence instructions' impact on an out‐of‐order pipeline.…”

Section: Related Workmentioning

confidence: 99%

DONUTS: An efficient method for checkpointing in non‐volatile memories

Kruger

Pannain

Azevedo

2023

Concurrency and Computation

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Non-volatile memory (NVM) is an emerging technology being explored as an alternative to DRAM main memory in computing systems because of its persistence, higher storage density, lower energy consumption, and access latency close to DRAM. However, persistent memory systems must ensure data consistency on system failures, a property known as crash consistency. One of the main challenges in these systems is creating efficient checkpointing mechanisms in terms of performance and usability. Thus, it is necessary to remove persistence from the critical execution path and reduce the excessive number of writes to NVM caused by logging operations, resulting in increased memory bandwidth usage. Another limitation is that most proposed mechanisms restrict application source code to programming interfaces based on transactional models, typed as software-based approaches. These factors make it challenging to adopt NVM systems. This article presents a software-transparent mechanism based on dynamic epochs with logging operations via processing-in-memory and checkpoints integrated into the cache replacement policy. Compared to the previous best-performing system, our strategy reduces 50.6% of writes to NVM. Furthermore, it does not increase the average memory bandwidth usage, providing crash consistency with less than 2% runtime overhead.

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Section: Related Workmentioning

confidence: 99%

DONUTS: An efficient method for checkpointing in non‐volatile memories

Kruger

Pannain

Azevedo

2023

Concurrency and Computation

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“…Shull et al [51] propose Execution Dependencies Extensions (EDE) to eliminate fences. EDE requires extensions in the ISA to encode dependencies detected by the compiler/programmer and propagate them to the hardware.…”

Section: Related Workmentioning

confidence: 99%

Free atomics

Asgharzadeh

Cebrian

Ros

2022

Proceedings of the 49th Annual International Symposium on Computer Architecture

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Atomic Read-Modify-Write (RMW) instructions are primitive synchronization operations implemented in hardware that provide the building blocks for higher-abstraction synchronization mechanisms to programmers. According to publicly available documentation, current x86 implementations serialize atomic RMW operations, i.e., the store buffer is drained before issuing atomic RMWs and subsequent memory operations are stalled until the atomic RMW commits. This serialization, carried out by memory fences, incurs a performance cost which is expected to increase with deeper pipelines.This work proposes Free atomics, a lightweight, speculative, deadlock-free implementation of atomic operations that removes the need for memory fences, thus improving performance, while preserving atomicity and consistency. Free atomics is, to the best of our knowledge, the first proposal to enable store-to-load forwarding for atomic RMWs. Free atomics only requires simple modifications and incurs a small area overhead (15 bytes). Our evaluation using gem5-20 shows that, for a 32-core configuration, Free atomics improves performance by 12.5%, on average, for a large range of parallel workloads and 25.2%, on average, for atomic-intensive parallel workloads over a fenced atomic RMW implementation. CCS CONCEPTS• Computer systems organization → Multicore architectures; • Theory of computation → Parallel computing models.

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Reconciling Selective Logging and Hardware Persistent Memory Transaction

Shen

et al. 2023

2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA)

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Execution Dependence Extension (EDE): ISA Support for Eliminating Fences

Cited by 4 publications

References 41 publications

DONUTS: An efficient method for checkpointing in non‐volatile memories

DONUTS: An efficient method for checkpointing in non‐volatile memories

Free atomics

Reconciling Selective Logging and Hardware Persistent Memory Transaction

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