Experimental Characterization and Signal Integrity Verification of Interconnect Lines with Inter-layer Vias

Abstract

Interconnect lines with inter-layer vias are experimentally characterized by using high-frequency S-parameter measurements. Test patterns are designed and fabricated using a package process. Then they are measured using Vector Network Analyzer (VNA) up to 25 GHz. Modeling a via as a circuit, its model parameters are determined. It is shown that the circuit model has excellent agreement with the measured S-parameters. The signal integrity of the lines with inter-layer vias is evaluated by using the developed circuit model. Thereby, it is shown that via may have a substantially deteriorative effect on the signal integrity of high-speed integrated circuits.

High-Speed Low-Power Global On-Chip Interconnect Based on Delayed Symbol Transmission

“…Smaller devices in a scaled technology have reduced parasitic capacitances, resulting in a decrease of logic gate delay [2]. Since technology scaling also leads to an increase in chip density, local on-chip interconnects get smaller and shorter, allowing their speed relatively constant [3]. But, the dimension of global on-chip interconnects has not been scaling down accordingly since overall chip size tends to be constant or marginally increasing due to increasing number of functional modules in a chip.…”

Implementation of Single-Wire Communication Protocol for 3D IC Thermal Management Systems using a Thin Film Thermoelectric Cooler

“…The area of the chips can be reduced by stacking in the z-direction and shortening the total wire length as a mix of vertical and horizontal wires is used [1,4]. In contrast, heat generation problems are exacerbated [5].…”

“…3D integration technology has recently been proposed to solve the limitations of delay, bandwidth, and power consumption in interconnects of integrated circuits (ICs) [1][2][3][4]. The area of the chips can be reduced by stacking in the z-direction and shortening the total wire length as a mix of vertical and horizontal wires is used [1,4].…”