2019
DOI: 10.1088/1361-6668/ab416a
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Experimental demonstration of a Josephson cryogenic memory cell based on coupled Josephson junction arrays

Abstract: In this paper, experimental verification for a cryogenic memory cell consisting of three inductively coupled Josephson junctions is presented. Design and operational logic of this type of cell was recently introduced. The basic memory cell operations (read, write, reset) can be implemented on the same simple circuit and this type of memory cell is fundamentally different from the existing single flux quantum-based memory cells. Here, we present design principles and experimental validation for write operations… Show more

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Cited by 10 publications
(3 citation statements)
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“…A lot of attempts have been made to develop cryogenic memories 10 , including Josephson junctionbased memories 11 , resistance-based memories such as ReRAM 12 , FeRAM 13 , MRAM [14][15][16] , hybrid memories 17,18 , and dynamic RAM (DRAM) [19][20][21][22] . Among these, DRAM is one of the strongest candidates for high-density memory at cryogenic temperatures since its fabrication is based on mature silicon CMOS technology.…”
Section: Mainmentioning
confidence: 99%
“…A lot of attempts have been made to develop cryogenic memories 10 , including Josephson junctionbased memories 11 , resistance-based memories such as ReRAM 12 , FeRAM 13 , MRAM [14][15][16] , hybrid memories 17,18 , and dynamic RAM (DRAM) [19][20][21][22] . Among these, DRAM is one of the strongest candidates for high-density memory at cryogenic temperatures since its fabrication is based on mature silicon CMOS technology.…”
Section: Mainmentioning
confidence: 99%
“…One reason for a large LUT circuit area is the large memory cell circuit area. Because the typical cell size of the SFQ memory is several tens µm square [16], [17], [18], [19], [20], the memory cell array occupies a large portion of the LUT circuit area. The other reason is that a complicated and dense wiring is needed to reconfigure the internal states of the memory cell array in the LUT for inputting SFQ signals to the memory cell.…”
Section: Introductionmentioning
confidence: 99%
“…Note, the cryogenic memory block is a crucial component of quantum computing systems based on superconducting qubits 38 . Our proposed QAHE-based memory device offers at least a million times reduction in the cell area and 1000 times reduction in the cell read/write power compared with the state-of-the-art cryogenic memory devices [39][40][41][42][43][44][45][46] (see supplementary Table S1 for detailed comparison). Our proposed memory device is a potential gamechanger for scalable quantum computing systems 38 and space cryogenics 47 . )…”
mentioning
confidence: 99%