Experimental demonstration of improved analog device performance of nanowire-TFETs

Two‐stage op‐amp and integrator realisation through GaAsP/AlGaSb nanowire CP‐TFET

“…To examine the capability of TFET in analogue circuits and also to scrutinise its analogue characteristics in this domain, we have considered Verilog A model for its simplicity and accuracy [21]. Importance of gate all around (GAA) structure for its exceptional electrostatic control [22][23][24] and the benefit of III-V materials have already been illustrated in many papers [25][26][27]. Therefore, in this work, the look-up table used in Verilog A model is obtained through TCAD simulation of AlGaSb/GaAsP charge plasma-TFET (CP-TFET) [27] and the circuit simulation is finally carried out in Cadence virtuoso.…”