Proceedings. 14th Symposium on Reliable Distributed Systems
DOI: 10.1109/reldis.1995.518719
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Experimental evaluation of the impact of processor faults on parallel applications

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Cited by 2 publications
(2 citation statements)
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“…For some results about such defensive mechanisms to be added to OTS components see for example [5,6].…”
Section: Analytical Evaluationmentioning
confidence: 99%
“…For some results about such defensive mechanisms to be added to OTS components see for example [5,6].…”
Section: Analytical Evaluationmentioning
confidence: 99%
“…The study presented in [5] stressed out the importance of including additional error detection schemes in order to increase the error coverage. If the underlying hardware system only provides a limited capability of error detection then the most reasonable solution is to include high-level fault-tolerant mechanisms that do not require any modification to the hardware or the operating system.…”
Section: Introductionmentioning
confidence: 99%