This paper presents an improved variant of a dc method to experimentally evaluate the base resistance of a bipolar transistor. The technique relies on a device model associated with a simple parameter optimization methodology, and is suited for modern technologies wherein self-heating and impact-ionization effects play a relevant role. The approach is successfully applied to state-of-the-art SiGe:C heterojunction bipolar transistors for high-frequency applications, although it can in principle be exploited for any bipolar device. The accuracy of the method is verified by numerical and experimental procedures.