Experimental Investigation of Single-Event Transient Waveforms Depending on Transistor Spacing and Charge Sharing in 65-nm CMOS

Mitrovic, Mladen; Hofbauer, Michael; Goll, Bernhard; Schneider-Hornstein, Kerstin; Swoboda, R.; Steindl, Bernhard; Voss, Kay‐Obbe; Zimmermann, Horst

doi:10.1109/tns.2017.2672820

Cited by 13 publications

(7 citation statements)

References 18 publications

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“…The difference in SET widths between the target circuits is also apparent at VDD = 1 V. Targets with dense inverter spacing (DUT1 and DUT2) show ∼40% smaller average pulsewidth in the Au experiment than targets with large spacing (DUT3 and DUT4). We observed the same behavior in [19], in which we presented data from separate experiment sessions performed on dedicated chip samples. The effect is less pronounced in the Ca experiment, with 24% smaller average pulsewidth for DUT1 compared to DUT4.…”

Section: Resultssupporting

confidence: 62%

“…In [18] and [19], we have presented a different approach to SET measurements, where full analog waveforms of pulses are being captured. For each ion hit, we can capture an SET waveform directly at the struck node, after propagation through subsequent inverters, and the resulting SET at the output of the targeted inverter chain.…”

Section: Related Workmentioning

confidence: 99%

“…Two chip samples were irradiated with a focused heavy-ion beam with an energy of 4.8 MeV per atomic mass unit-one sample was scanned with 48 Ca ions [linear energy transfer (LET) = 17 MeV • cm 2 /mg], and the other with 197 Au ions (LET = 95 MeV • cm 2 /mg). The beam control and data collection system is described in [18] and [19]. The exposed chip was bonded onto the RF circuit board, placed inside the vacuum chamber, and connected to the outside instruments via the feedthroughs.…”

Section: Test Chip and Experimental Setupmentioning

confidence: 99%

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Experimental Investigation of the Joint Influence of Reduced Supply Voltage and Charge Sharing on Single-Event Transient Waveforms in 65-nm Triple-Well CMOS

Mitrovic

Hofbauer

Voss

et al. 2018

IEEE Trans. Nucl. Sci.

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Full waveforms of single-event transients (SETs) in inverter chains were measured under focused heavy-ion microbeam irradiation. Inverter chains of varying spacings were irradiated with 48 Ca and 197 Au ions. The influence of changing the supply voltage from subthreshold to nominal level on SET forming and propagation was investigated, and the role of charge sharing is discussed. Key factors that influence SET widths and cross sections are identified across the applied range of supply voltages. A simple method is presented for estimating average SET widths at decreased supply voltages, and is based on the SET width measurements at nominal supply voltage, transistorlevel simulations, and extracted circuit parameters. The proposed method matches well with the measured data.

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Section: Resultssupporting

confidence: 62%

Section: Related Workmentioning

confidence: 99%

Section: Test Chip and Experimental Setupmentioning

confidence: 99%

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Experimental Investigation of the Joint Influence of Reduced Supply Voltage and Charge Sharing on Single-Event Transient Waveforms in 65-nm Triple-Well CMOS

Mitrovic

Hofbauer

Voss

et al. 2018

IEEE Trans. Nucl. Sci.

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“…On the basis of this method, Huang et al [8] proposed a structure that can simultaneously measure multiple transient pulses, using eight capture circuits to share a self-trigger structure design, which can measure the SEMT. This improvement has also been widely used by researchers [6,10,18].…”

Section: Introductionmentioning

confidence: 98%

“…In Reference [14], pulse quenching can also affect SET. At the 65 nm process node, a lot of research has been done on the characterization of SET [3,[15][16][17][18], but in more advanced processes, the results of experimental measurements on SET are still few.…”

Section: Introductionmentioning

confidence: 99%

Investigation of Heavy-Ion Induced Single-Event Transient in 28 nm Bulk Inverter Chain

Liang

Chi

et al. 2020

Symmetry

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The reliability of integrated circuits under advanced process nodes is facing more severe challenges. Single-event transients (SET) are an important cause of soft errors in space applications. The SET caused by heavy ions in the 28 nm bulk silicon inverter chains was studied. A test chip with good symmetry layout design was fabricated based on the 28 nm process, and the chip was struck by using 5 kinds of heavy ions with different linear energy transfer (LET) values on heavy-ion accelerator. The research results show that in advanced technology, smaller sensitive volume makes SET cross-section measured at 28 nm smaller than 65 nm by an order of magnitude, the lower critical charge required to generate SET will increase the reliability threat of low-energy ions to the circuit, and high-energy ions are more likely to cause single-event multiple transient (SEMT), which cannot be ignored in practical circuits. The transients pulse width data can be used as a reference for SET modeling in complex circuits.

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Radiation Effects in CMOS Technology

Prinzie

Steyaert

Leroux

2018

Analog Circuits and Signal Processing

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Experimental Investigation of Single-Event Transient Waveforms Depending on Transistor Spacing and Charge Sharing in 65-nm CMOS

Cited by 13 publications

References 18 publications

Experimental Investigation of the Joint Influence of Reduced Supply Voltage and Charge Sharing on Single-Event Transient Waveforms in 65-nm Triple-Well CMOS

Experimental Investigation of the Joint Influence of Reduced Supply Voltage and Charge Sharing on Single-Event Transient Waveforms in 65-nm Triple-Well CMOS

Investigation of Heavy-Ion Induced Single-Event Transient in 28 nm Bulk Inverter Chain

Radiation Effects in CMOS Technology

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