Experimental Study of ALD HfO[sub 2] Deposited on Strained Silicon-on-Insulator and Standard SOI

Abstract

HfO 2 films of 4 nm were deposited by atomic layer deposition on silicon-on-insulator ͑SOI͒ substrates with various amounts of intentionally introduced lattice strain and several film thicknesses. After postdeposition annealing ͑PDA͒, the samples were studied by Rutherford backscattering spectroscopy, Raman spectroscopy, high-resolution transmission electron microscopy ͑HRTEM͒, electron energy-loss spectroscopy ͑EELS͒, and X-ray photoelectron spectroscopy ͑XPS͒. The as-deposited HfO 2 film showed a good stoichiometry and thickness uniformity. The strain in strained SOI ͑sSOI͒ layers remained after high-temperature PDA at 1100°C. HRTEM images showed that, while HfO 2 films on standard nonstrained SOI became polycrystalline after PDA at 600°C, HfO 2 films on sSOI remained amorphous. The strain in the sSOI layer also suppressed the interlayer ͑IL͒ growth during PDA. The EELS and XPS results confirmed the interdiffusion across the HfO 2 /Si interface. The XPS data also showed that the formation of Hf-O-Si bonds depends on the SOI lattice strain and thickness. The SOI thickness is critical to reduce the formation of silicate in the IL.Hafnium-based high-K dielectrics have been extensively studied as a replacement for Si dioxide or Si oxynitride ͑SiO x N y ͒-based gate dielectrics in future generation complementary metal-oxide semiconductor devices. 1,2 However, an unstable interface with Si limits the equivalent oxide thickness scalability, and the accumulation of high fixed charge degrades the carrier mobility of high-K dielectrics. 3 Silicon-on-insulator ͑SOI͒ wafer technology reduces parasitic effects and requires less current for switching. 4 Substrates with a higher mobility, such as strained Si and Ge, help to compensate for the reduced mobility of a high-K gate stack. 5,6 Combining SOI with strained Si technology into strained SOI ͑sSOI͒ significantly increases the device speed and reduces power consumption. 7,8 It has been reported that the strained Si is stable up to an annealing temperature of 1000°C for 30 s. 9,10 Until now, the effect of strained Si in sSOI on HfO 2 /Si interlayer growth and HfO 2 quality has remained unclear. In this paper, we deposited 4 nm HfO 2 film by atomic layer deposition ͑ALD͒ on SOI and sSOI substrates with a different amount of strain and various thicknesses. The effect of high-temperature annealing on strain relaxation was studied and the effects of the strained Si layer thickness and the amount of strain on the interlayer ͑IL͒ properties were then evaluated. ExperimentalSilicon substrates were cleaned by dipping in 2% HF for 4 min followed by a deionized water rinse to remove native oxide, and were immediately transferred to the ALD reactor chamber for HfO 2 deposition. The engineered substrates ͓SOI, sSOI, and extra-strained Si ͑xsSOI͔͒ listed in Table I were prepared by Smart Cut technology. 11 Strained Si and xsSOI were initially grown epitaxially on Si 0.8 Ge 0.2 and Si 0.7 Ge 0.3 , respectively. The thickness of the top Si layers was measured by spectroscopic ellipsometer...

Electrical Properties of High-k ALD HfO2 Deposited on Strained Si Layers Epitaxially Grown on Si0.8Ge0.2/Si Substrates

“…The difference for this case is only in the order of few Å. The rapid growth of interlayer under e-beam heating in the TEM is a particular property of HfO 2 on strained silicon, which was also observed and reported by Gu et al (5). …”

Amorphous Boron Nitride: A Universal, Ultrathin Dielectric For 2D Nanoelectronics

“…[ 7 ] In silicon-based electronics, silicon dioxide (SiO 2 ) has proven to be an ideal dielectric material due to the large band gap (9 eV), well-matched interfacial properties with silicon, and simple, repeatable processing. Atomic layer deposition of HfO 2 [ 9,10 ] and Al 2 O 3 , [ 11 ] thermal activated growth of h -BN by CVD, and other alternatives to SiO 2 are some of the recently reported direct-growth approaches that suffer from significant scaling, process tuning, and pinhole-free uniformity challenges. While integration of SiO 2 on silicon-based devices is commonplace, synthesis of ultrathin dielectrics with interfacial characteristics suitable for use with diverse (i.e., electrically insulating and conducting) 2D materials, without compromising unique 2D benefi ts such as optical transparency and mechanical fl exibility, is critical for realization of fl exible electronic devices and other premium wileyonlinelibrary.com © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim areas of nanotechnological innovation.…”

Synthesis of Nested Coaxial Multiple-Walled Nanotubes by Atomic Layer Deposition

“…21,22 The technical details of the ALD process conditions and the different chemical precursors and deposition parameters utilized for all of the nested nanotubes investigated in this study are listed in Table 1. 10,11,23 Following the ALD deposition of the aforementioned materials, the AAO sample surfaces were polished by ion milling to expose the template surface and the ALD grown alumina spacer to the NaOH solution. A 1 M NaOH solution was used to etch alu- mina for all ALD nanotube materials except for ZnO nanotubes.…”